From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754083AbcIMDvJ (ORCPT ); Mon, 12 Sep 2016 23:51:09 -0400 Received: from mail-pf0-f170.google.com ([209.85.192.170]:34498 "EHLO mail-pf0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752739AbcIMDvH (ORCPT ); Mon, 12 Sep 2016 23:51:07 -0400 Date: Mon, 12 Sep 2016 20:51:03 -0700 From: Bjorn Andersson To: Iaroslav Gridin Cc: andy.gross@linaro.org, david.brown@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: dts: msm8974: Add definitions for QCE & cryptobam Message-ID: <20160913035103.GA21438@tuxbot> References: <20160830153740.13275-1-voker57@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160830153740.13275-1-voker57@gmail.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue 30 Aug 08:37 PDT 2016, Iaroslav Gridin wrote: > From: Voker57 > > Add device tree definitions for Qualcomm Cryptography engine and its BAM > Signed-off-by: Iaroslav Gridin > --- > arch/arm/boot/dts/qcom-msm8974.dtsi | 42 +++++++++++++++++++++++++++++++++++++ > 1 file changed, 42 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi > index 561d4d1..c0da739 100644 > --- a/arch/arm/boot/dts/qcom-msm8974.dtsi > +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi > @@ -287,6 +287,48 @@ > reg = <0xf9011000 0x1000>; > }; > > + cryptobam: dma@fd444000 { > + compatible = "qcom,bam-v1.4.0"; > + reg = <0xfd444000 0x15000>; > + interrupts = <0 236 0>; > + clocks = <&gcc GCC_CE2_AHB_CLK>, > + <&gcc GCC_CE2_AXI_CLK>, > + <&gcc GCC_CE2_CLK>; > + clock-names = "bam_clk", "axi_clk", "core_clk"; > + #dma-cells = <1>; > + qcom,ee = <1>; > + qcom,controlled-remotely; > + }; As Stan noted, please shift this '}' one step left (the rest looks well indented. > + > + qcom,qcrypto@fd440000 { Rename this "qcrypto" and make sure the address matches the reg property. > + compatible = "qcom,crypto-v5.1"; > + reg = <0xfd45a000 0x6000>; > + reg-names = "crypto-base"; > + interrupts = <0 236 0>; > + qcom,bam-pipe-pair = <2>; > + qcom,ce-hw-instance = <1>; > + qcom,ce-device = <0>; > + clocks = <&gcc GCC_CE2_CLK>, > + <&gcc GCC_CE2_AHB_CLK>, > + <&gcc GCC_CE2_AXI_CLK>, > + <&gcc CE2_CLK_SRC>; > + > + dmas = <&cryptobam 2>, <&cryptobam 3>; > + dma-names = "rx", "tx"; > + clock-names = "core", "iface", "bus", "core_src"; > + qcom,clk-mgmt-sus-res; > + qcom,msm-bus,name = "qcrypto-noc"; > + > + qcom,msm-bus,num-cases = <2>; > + qcom,msm-bus,num-paths = <1>; > + qcom,use-sw-aes-cbc-ecb-ctr-algo; > + qcom,use-sw-aes-xts-algo; > + qcom,use-sw-ahash-algo; > + qcom,msm-bus,vectors-KBps = <56 512 0 0>, > + <56 512 3936000 393600>; > + }; > + > + > timer@f9020000 { It's nice to keep the nodes within a group ordered by address. Regards, Bjorn