From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753878AbcIMCFy (ORCPT ); Mon, 12 Sep 2016 22:05:54 -0400 Received: from mail-pa0-f66.google.com ([209.85.220.66]:33961 "EHLO mail-pa0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752778AbcIMCFx (ORCPT ); Mon, 12 Sep 2016 22:05:53 -0400 Date: Tue, 13 Sep 2016 12:05:42 +1000 From: Nicholas Piggin To: Peter Zijlstra Cc: Linus Torvalds , Will Deacon , Oleg Nesterov , Paul McKenney , Benjamin Herrenschmidt , Michael Ellerman , linux-kernel@vger.kernel.org, Ingo Molnar , Alan Stern Subject: Re: Question on smp_mb__before_spinlock Message-ID: <20160913120542.0edf5501@roar.ozlabs.ibm.com> In-Reply-To: <20160912125403.GS10153@twins.programming.kicks-ass.net> References: <20160905093753.GN10138@twins.programming.kicks-ass.net> <20160907221726.37981b30@roar.ozlabs.ibm.com> <20160907132354.GR10138@twins.programming.kicks-ass.net> <20160912122708.71a91ea3@roar.ozlabs.ibm.com> <20160912125403.GS10153@twins.programming.kicks-ass.net> Organization: IBM X-Mailer: Claws Mail 3.14.0 (GTK+ 2.24.30; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 12 Sep 2016 14:54:03 +0200 Peter Zijlstra wrote: > On Mon, Sep 12, 2016 at 12:27:08PM +1000, Nicholas Piggin wrote: > > On Wed, 7 Sep 2016 15:23:54 +0200 > > Peter Zijlstra wrote: > > > > Interesting idea.. > > > > > > So I'm not a fan of that raw_spin_lock wrapper, since that would end up > > > with a lot more boiler-plate code than just the one extra barrier. > > > > #ifndef sched_ctxsw_raw_spin_lock > > #define sched_ctxsw_raw_spin_lock(lock) raw_spin_lock(lock) > > #endif > > > > #define sched_ctxsw_raw_spin_lock(lock) do { smp_mb() ; raw_spin_lock(lock); } while (0) > > I was thinking you wanted to avoid the lwsync in arch_spin_lock() > entirely, at which point you'll grow more layers. Because then you get > an arch_spin_lock_mb() or something and then you'll have to do the > raw_spin_lock wrappery for that. > > Or am I missing the point of having the raw_spin_lock wrapper, as > opposed to the extra barrier after it? > > Afaict the benefit of having that wrapper is so you can avoid issuing > multiple barriers. Oh you could do that too yes. But it's all going to be in arch/powerpc, so I don't know if layers would be much problem. I was thinking to avoid the hwsync inside the critical section. > > > But moving MMIO/DMA/TLB etc.. barriers into this spinlock might not be a > > > good idea, since those are typically fairly heavy barriers, and its > > > quite common to call schedule() without ending up in switch_to(). > > > > That's true I guess, but if we already have the arch specific smp_mb__ > > specifically for this context switch code, and you are asking for them to > > implement *cacheable* memory barrier vs migration, then I see no reason > > not to allow them to implement uncacheable as well. > > > > You make a good point about schedule() without switch_to(), but > > architectures will still have no less flexibility than they do now. > > Ah, so you're saying make it optional where they put it? I was initially > thinking you wanted to add it to the list of requirements. Sure, > optional works. Yes i.e., this primitive must provide minimally X, and optionally Y. If Y is not provided, then switch_to or other arch hook must provide it. Thanks, Nick