From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933253AbcIVKgD (ORCPT ); Thu, 22 Sep 2016 06:36:03 -0400 Received: from bear.ext.ti.com ([198.47.19.11]:52233 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753695AbcIVKf4 (ORCPT ); Thu, 22 Sep 2016 06:35:56 -0400 From: Peter Ujfalusi To: , , , , CC: , , , , Subject: [PATCH v2 1/3] dt-bindings: display: display-timing: Add property to configure sync drive edge Date: Thu, 22 Sep 2016 13:35:24 +0300 Message-ID: <20160922103526.24925-2-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.10.0 In-Reply-To: <20160922103526.24925-1-peter.ujfalusi@ti.com> References: <20160922103526.24925-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There are display panels which demands that the sync signal is driven on different edge than the pixel data. With the syncclk-active property we can specify the clk edge to be used to drive the sync signal. When the property is missing it indicates that the sync is driven on the same edge as the pixel data. Signed-off-by: Peter Ujfalusi CC: Rob Herring CC: Mark Rutland CC: devicetree@vger.kernel.org --- .../devicetree/bindings/display/panel/display-timing.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/display-timing.txt b/Documentation/devicetree/bindings/display/panel/display-timing.txt index e1d4a0b59612..81a75893d1b8 100644 --- a/Documentation/devicetree/bindings/display/panel/display-timing.txt +++ b/Documentation/devicetree/bindings/display/panel/display-timing.txt @@ -32,6 +32,14 @@ optional properties: - active low = drive pixel data on falling edge/ sample data on rising edge - ignored = ignored + - syncclk-active: with + - active high = drive sync on rising edge/ + sample sync on falling edge of pixel + clock + - active low = drive sync on falling edge/ + sample sync on rising edge of pixel + clock + - omitted = same configuration as pixelclk-active - interlaced (bool): boolean to enable interlaced mode - doublescan (bool): boolean to enable doublescan mode - doubleclk (bool): boolean to enable doubleclock mode -- 2.10.0