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Date: Sun, 30 Oct 2016 14:10:21 +0800
From: kbuild test robot <fengguang.wu@intel.com>
To: Pete Delaney <piet@tensilica.com>
Cc: kbuild-all@01.org, linux-kernel@vger.kernel.org,
        Chris Zankel <chris@zankel.net>, Max Filippov <jcmvbkbc@gmail.com>
Subject: arch/xtensa/include/asm/initialize_mmu.h:41: Error: invalid register
 'atomctl' for 'wsr' instruction
Message-ID: <201610301415.VHu1ucqC%fengguang.wu@intel.com>
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Hi Pete,

FYI, the error/warning still remains.

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   2a26d99b251b8625d27aed14e97fc10707a3a81f
commit: d0b73b488c55df905ea8faaad079f8535629ed26 xtensa: Add config files for Diamond 233L - Rev C processor variant
date:   3 years, 8 months ago
config: xtensa-generic_kc705_defconfig (attached as .config)
compiler: xtensa-linux-gcc (GCC) 4.9.0
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git checkout d0b73b488c55df905ea8faaad079f8535629ed26
        # save the attached .config to linux build tree
        make.cross ARCH=xtensa 

All errors (new ones prefixed by >>):

   arch/xtensa/include/asm/initialize_mmu.h: Assembler messages:
>> arch/xtensa/include/asm/initialize_mmu.h:41: Error: invalid register 'atomctl' for 'wsr' instruction

vim +41 arch/xtensa/include/asm/initialize_mmu.h

c622b29d Max Filippov 2012-11-19  25  
c622b29d Max Filippov 2012-11-19  26  #ifdef __ASSEMBLY__
c622b29d Max Filippov 2012-11-19  27  
c622b29d Max Filippov 2012-11-19  28  #define XTENSA_HWVERSION_RC_2009_0 230000
c622b29d Max Filippov 2012-11-19  29  
c622b29d Max Filippov 2012-11-19  30  	.macro	initialize_mmu
c622b29d Max Filippov 2012-11-19  31  
c622b29d Max Filippov 2012-11-19  32  #if XCHAL_HAVE_S32C1I && (XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RC_2009_0)
c622b29d Max Filippov 2012-11-19  33  /*
c622b29d Max Filippov 2012-11-19  34   * We Have Atomic Operation Control (ATOMCTL) Register; Initialize it.
c622b29d Max Filippov 2012-11-19  35   * For details see Documentation/xtensa/atomctl.txt
c622b29d Max Filippov 2012-11-19  36   */
c622b29d Max Filippov 2012-11-19  37  #if XCHAL_DCACHE_IS_COHERENT
c622b29d Max Filippov 2012-11-19  38  	movi	a3, 0x25	/* For SMP/MX -- internal for writeback,
c622b29d Max Filippov 2012-11-19  39  				 * RCW otherwise
c622b29d Max Filippov 2012-11-19  40  				 */
c622b29d Max Filippov 2012-11-19 @41  #else
c622b29d Max Filippov 2012-11-19  42  	movi	a3, 0x29	/* non-MX -- Most cores use Std Memory
c622b29d Max Filippov 2012-11-19  43  				 * Controlers which usually can't use RCW
c622b29d Max Filippov 2012-11-19  44  				 */
c622b29d Max Filippov 2012-11-19  45  #endif
c622b29d Max Filippov 2012-11-19  46  	wsr	a3, atomctl
c622b29d Max Filippov 2012-11-19  47  #endif  /* XCHAL_HAVE_S32C1I &&
c622b29d Max Filippov 2012-11-19  48  	 * (XCHAL_HW_MIN_VERSION >= XTENSA_HWVERSION_RC_2009_0)
c622b29d Max Filippov 2012-11-19  49  	 */

:::::: The code at line 41 was first introduced by commit
:::::: c622b29d1f38021411965b7e0170ab055551b257 xtensa: initialize atomctl SR

:::::: TO: Max Filippov <jcmvbkbc@gmail.com>
:::::: CC: Chris Zankel <chris@zankel.net>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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