From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752147AbcKGUM3 (ORCPT ); Mon, 7 Nov 2016 15:12:29 -0500 Received: from mail.skyhub.de ([78.46.96.112]:56206 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750905AbcKGUM1 (ORCPT ); Mon, 7 Nov 2016 15:12:27 -0500 Date: Mon, 7 Nov 2016 21:12:24 +0100 From: Borislav Petkov To: "Luck, Tony" Cc: Sebastian Andrzej Siewior , linux-kernel@vger.kernel.org, rt@linutronix.de, linux-edac@vger.kernel.org, x86@kernel.org, Thomas Gleixner Subject: Re: [PATCH 22/25] x86/mcheck: Do the init in one place Message-ID: <20161107201224.7xazmhgm7bogkrw5@pd.tnic> References: <20161103145021.28528-1-bigeasy@linutronix.de> <20161103145021.28528-23-bigeasy@linutronix.de> <20161107184532.xj6wzdjlzwhshcmf@pd.tnic> <20161107185524.GA2536@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20161107185524.GA2536@intel.com> User-Agent: NeoMutt/20161014 (1.7.1) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Nov 07, 2016 at 10:55:24AM -0800, Luck, Tony wrote: > I don't think that helps as much as you'd like it to help (at > least on Intel). A broadcast machine check that finds the boot > CPU has set CR4[MCE]=1 is still going to end up in reset if any > other CPU still has CR4[MCE]=0 By leaving/moving the setting of CR4 earlier on all cores, we'll at least make the possible window for such potential resets a lot smaller... -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.