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From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: Re: [PATCH] clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks
Date: Fri, 11 Nov 2016 21:48:20 +0100	[thread overview]
Message-ID: <20161111204820.sowe7jj7i3lsltuf@lukather> (raw)
In-Reply-To: <20161111100558.14629-2-wens@csie.org>

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On Fri, Nov 11, 2016 at 06:05:58PM +0800, Chen-Yu Tsai wrote:
> The audio module clocks are supposed to be set according to the sample
> rate of the audio stream. The audio PLL provides the clock signal for
> thees module clocks, and only it is freely tunable.
> 
> Set CLK_SET_RATE_PARENT for the audio module clocks so their users can
> properly tune the clock rate.
> 
> Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks")
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Fixed the typo and applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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      parent reply	other threads:[~2016-11-11 20:48 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-11 10:05 [PATCH] clk: sunxi-ng: sun8i-a23: Set CLK_SET_RATE_PARENT for audio module clocks Chen-Yu Tsai
2016-11-11 10:05 ` [PATCH] clk: sunxi-ng: sun8i-h3: " Chen-Yu Tsai
2016-11-11 10:10   ` [linux-sunxi] " Code Kipper
2016-11-11 20:48   ` Maxime Ripard [this message]

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