From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754733AbcKNGf5 (ORCPT ); Mon, 14 Nov 2016 01:35:57 -0500 Received: from mail.skyhub.de ([78.46.96.112]:42946 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751731AbcKNGfz (ORCPT ); Mon, 14 Nov 2016 01:35:55 -0500 Date: Mon, 14 Nov 2016 07:29:01 +0100 From: Borislav Petkov To: Peter Zijlstra Cc: X86 ML , LKML , Thomas Gleixner , Yazen Ghannam Subject: Re: [PATCH] x86/topology: Document cpu_llc_id Message-ID: <20161114062901.il4ucv5muw4ksfsv@pd.tnic> References: <20160907092219.5523-1-bp@alien8.de> <20160907103641.GO10138@twins.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20160907103641.GO10138@twins.programming.kicks-ass.net> User-Agent: NeoMutt/20161014 (1.7.1) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 07, 2016 at 12:36:41PM +0200, Peter Zijlstra wrote: > On Wed, Sep 07, 2016 at 11:22:19AM +0200, Borislav Petkov wrote: > > From: Borislav Petkov > > > > It means different things on Intel and AMD so write it down so that > > there's no confusion. > > > > Signed-off-by: Borislav Petkov > > Cc: Peter Zijlstra > > Cc: Thomas Gleixner > > --- > > Documentation/x86/topology.txt | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/x86/topology.txt b/Documentation/x86/topology.txt > > index 06afac252f5b..7a5485730476 100644 > > --- a/Documentation/x86/topology.txt > > +++ b/Documentation/x86/topology.txt > > @@ -63,6 +63,12 @@ The topology of a system is described in the units of: > > The maximum possible number of packages in the system. Helpful for per > > package facilities to preallocate per package information. > > > > + - cpu_llc_id: > > + > > + A per-CPU variable containing: > > + - On Intel, the first APIC ID of the list of CPUs sharing the Last Level > > + Cache > > + - On AMD, the Node ID containing the Last Level Cache. > > And there are no AMD parts where there are multiple LLCs on a Node? Like > where there isn't an L3 and the L2 is only per cluster? Yes there are (now), see: http://git.kernel.org/tip/b0b6e86846093c5f8820386bc01515f857dd8faa But those LLC ID numbers are still increasing IDs of either nodes or core complexes in Zen's case. So I think the text should say: "- On AMD, the Node ID or Core Complex ID containing the Last Level Cache. In general, numbers identifying an LLC uniquely on the system." How's that? -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.