From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755627AbcKOKht (ORCPT ); Tue, 15 Nov 2016 05:37:49 -0500 Received: from mga01.intel.com ([192.55.52.88]:44101 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753844AbcKOKhr (ORCPT ); Tue, 15 Nov 2016 05:37:47 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,494,1473145200"; d="scan'208";a="1085412918" From: Andy Shevchenko To: Lee Jones , linux-kernel@vger.kernel.org, Mika Westerberg Cc: Andy Shevchenko Subject: [PATCH v2 1/1] mfd: intel-lpss: Try to enable Memory-Write-Invalidate Date: Tue, 15 Nov 2016 12:37:04 +0200 Message-Id: <20161115103704.93476-1-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.9.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable MWI mechanism if PCI bus master supports it. It might be potential benefit in some cases. Documentation [1] says that standard Memory Write might supply more current data than in the CPU modified cache line and "trashing a line in the cache may trash some data that is more current that in the memory line". This allows to avoid potential retries and other performance degradation issues on the bus. [1] PCI System Architecture, 4th edition, ISBN: 0-201-30974-2, pp.117-119. Signed-off-by: Andy Shevchenko --- In v2: - extend commit message drivers/mfd/intel-lpss-pci.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c index 50e78db..4756153 100644 --- a/drivers/mfd/intel-lpss-pci.c +++ b/drivers/mfd/intel-lpss-pci.c @@ -41,6 +41,7 @@ static int intel_lpss_pci_probe(struct pci_dev *pdev, /* Probably it is enough to set this for iDMA capable devices only */ pci_set_master(pdev); + pci_try_set_mwi(pdev); ret = intel_lpss_probe(&pdev->dev, info); if (ret) -- 2.9.3