From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933682AbcKPRaX (ORCPT ); Wed, 16 Nov 2016 12:30:23 -0500 Received: from bombadil.infradead.org ([198.137.202.9]:55308 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932995AbcKPRaU (ORCPT ); Wed, 16 Nov 2016 12:30:20 -0500 Date: Wed, 16 Nov 2016 18:30:05 +0100 From: Peter Zijlstra To: Janakarajan Natarajan Cc: linux-kernel@vger.kernel.org, Ingo Molnar , Arnaldo Carvalho de Melo , Alexander Shishkin , Suravee Suthikulpanit Subject: Re: [PATCH] Support for perf on AMD family17h processors Message-ID: <20161116173005.GW3142@twins.programming.kicks-ass.net> References: <1479315713-11115-1-git-send-email-Janakarajan.Natarajan@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1479315713-11115-1-git-send-email-Janakarajan.Natarajan@amd.com> User-Agent: Mutt/1.5.23.1 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Nov 16, 2016 at 11:01:53AM -0600, Janakarajan Natarajan wrote: > This patch enables perf core PMU support for AMD family17h processors. > In family17h, there is no PMC-event constraint. All events, irrespective > of the type, can be measured using any of the performance counters. > Is there a public document describing this thing about already? > + case 0x17: > + pr_cont("Fam17h "); > + /* In family 17h, there are no event constraints in the PMC hardware. > + * We fallback to using default amd_get_event_constraints. > + */ > + break; http://lkml.kernel.org/r/CA+55aFyQYJerovMsSoSKS7PessZBr4vNp-3QUUwhqk4A4_jcbg@mail.gmail.com