From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753998AbcKRSoV (ORCPT ); Fri, 18 Nov 2016 13:44:21 -0500 Received: from mail-wm0-f51.google.com ([74.125.82.51]:36392 "EHLO mail-wm0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752668AbcKRSoT (ORCPT ); Fri, 18 Nov 2016 13:44:19 -0500 Date: Fri, 18 Nov 2016 18:47:15 +0000 From: Lee Jones To: Andrew Jeffery , arnd@arndb.de Cc: Linus Walleij , Joel Stanley , Mark Rutland , Rob Herring , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 2/6] mfd: dt: Add bindings for the Aspeed SoC Display Controller (GFX) Message-ID: <20161118184715.GG19884@dell.home> References: <1478097481-14895-1-git-send-email-andrew@aj.id.au> <1478097481-14895-3-git-send-email-andrew@aj.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1478097481-14895-3-git-send-email-andrew@aj.id.au> User-Agent: Mutt/1.6.2 (2016-07-01) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 03 Nov 2016, Andrew Jeffery wrote: > The Aspeed SoC Display Controller is presented as a syscon device to > arbitrate access by display and pinmux drivers. Video pinmux > configuration on fifth generation SoCs depends on bits in both the > System Control Unit and the Display Controller. > > Signed-off-by: Andrew Jeffery > --- > Documentation/devicetree/bindings/mfd/aspeed-gfx.txt | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/aspeed-gfx.txt Same here. > diff --git a/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt b/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt > new file mode 100644 > index 000000000000..aea5370efd97 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/aspeed-gfx.txt > @@ -0,0 +1,17 @@ > +* Device tree bindings for Aspeed SoC Display Controller (GFX) > + > +The Aspeed SoC Display Controller primarily does as its name suggests, but also > +participates in pinmux requests on the g5 SoCs. It is therefore considered a > +syscon device. > + > +Required properties: > +- compatible: "aspeed,ast2500-gfx", "syscon" > +- reg: contains offset/length value of the GFX memory > + region. > + > +Example: > + > +gfx: display@1e6e6000 { > + compatible = "aspeed,ast2500-gfx", "syscon"; > + reg = <0x1e6e6000 0x1000>; > +}; -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog