From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752366AbcLFC4S (ORCPT ); Mon, 5 Dec 2016 21:56:18 -0500 Received: from out5-smtp.messagingengine.com ([66.111.4.29]:54965 "EHLO out5-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751667AbcLFCzc (ORCPT ); Mon, 5 Dec 2016 21:55:32 -0500 X-ME-Sender: X-Sasl-enc: +1r9D2o4D3HHcSVZFG9OK2ulVE/dZAlReSKw+1NaNBqH 1480992879 From: Andrew Jeffery To: Lee Jones Cc: Andrew Jeffery , Rob Herring , Mark Rutland , Linus Walleij , Corey Minyard , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Joel Stanley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 5/6] mfd: dt: Add bindings for the Aspeed SoC Display Controller (GFX) Date: Tue, 6 Dec 2016 13:53:20 +1100 Message-Id: <20161206025321.1792-6-andrew@aj.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20161206025321.1792-1-andrew@aj.id.au> References: <20161206025321.1792-1-andrew@aj.id.au> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Aspeed SoC Display Controller is presented as a syscon device to arbitrate access by display and pinmux drivers. Video pinmux configuration on fifth generation SoCs depends on bits in both the System Control Unit and the Display Controller. Signed-off-by: Andrew Jeffery Acked-by: Rob Herring --- .../devicetree/bindings/mfd/syscon/aspeed-gfx.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/syscon/aspeed-gfx.txt diff --git a/Documentation/devicetree/bindings/mfd/syscon/aspeed-gfx.txt b/Documentation/devicetree/bindings/mfd/syscon/aspeed-gfx.txt new file mode 100644 index 000000000000..aea5370efd97 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/syscon/aspeed-gfx.txt @@ -0,0 +1,17 @@ +* Device tree bindings for Aspeed SoC Display Controller (GFX) + +The Aspeed SoC Display Controller primarily does as its name suggests, but also +participates in pinmux requests on the g5 SoCs. It is therefore considered a +syscon device. + +Required properties: +- compatible: "aspeed,ast2500-gfx", "syscon" +- reg: contains offset/length value of the GFX memory + region. + +Example: + +gfx: display@1e6e6000 { + compatible = "aspeed,ast2500-gfx", "syscon"; + reg = <0x1e6e6000 0x1000>; +}; -- 2.9.3