From: Andrew Jeffery <andrew@aj.id.au>
To: Joel Stanley <joel@jms.id.au>
Cc: Andrew Jeffery <andrew@aj.id.au>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v4 6/6] arm: dts: aspeed-g5: Add gpio controller to devicetree
Date: Tue, 6 Dec 2016 14:53:48 +1100 [thread overview]
Message-ID: <20161206035348.29948-7-andrew@aj.id.au> (raw)
In-Reply-To: <20161206035348.29948-1-andrew@aj.id.au>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
arch/arm/boot/dts/aspeed-g5.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 6ccabdb90e95..a95c1b08a816 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -898,6 +898,16 @@
reg = <0x1e720000 0x9000>; // 36K
};
+ gpio: gpio@1e780000 {
+ #gpio-cells = <2>;
+ gpio-controller;
+ compatible = "aspeed,ast2500-gpio";
+ reg = <0x1e780000 0x1000>;
+ interrupts = <20>;
+ gpio-ranges = <&pinctrl 0 0 220>;
+ interrupt-controller;
+ };
+
timer: timer@1e782000 {
compatible = "aspeed,ast2400-timer";
reg = <0x1e782000 0x90>;
--
2.9.3
prev parent reply other threads:[~2016-12-06 3:54 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-06 3:53 [PATCH v4 0/6] aspeed: Integrate pinctrl and gpio drivers Andrew Jeffery
2016-12-06 3:53 ` [PATCH v4 1/6] arm: dts: aspeed-g4: Add syscon and pin controller nodes Andrew Jeffery
2016-12-06 3:53 ` [PATCH v4 2/6] arm: dts: aspeed-g4: Add gpio controller to devicetree Andrew Jeffery
2016-12-06 3:53 ` [PATCH v4 3/6] arm: dts: aspeed-g5: Add SoC Display Controller node Andrew Jeffery
2016-12-06 3:53 ` [PATCH v4 4/6] arm: dts: aspeed-g5: Add LPC " Andrew Jeffery
2016-12-06 3:53 ` [PATCH v4 5/6] arm: dts: aspeed-g5: Add syscon and pin controller nodes Andrew Jeffery
2016-12-06 3:53 ` Andrew Jeffery [this message]
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