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Date: Tue, 6 Dec 2016 06:53:49 -0800
From: Andi Kleen <andi@firstfloor.org>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Andi Kleen <andi@firstfloor.org>, linux-kernel@vger.kernel.org,
        Andi Kleen <ak@linux.intel.com>, alexander.shishkin@intel.com,
        kan.liang@intel.com, stable@vger.kernel.org
Subject: Re: [PATCH] perf/x86: Fix exclusion of BTS and LBR for Goldmont
Message-ID: <20161206145349.GN26852@two.firstfloor.org>
References: <20161202231732.25478-1-andi@firstfloor.org>
 <20161206123848.GS3207@twins.programming.kicks-ass.net>
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> > -	if (x86_pmu.lbr_pt_coexist)
> > +	if (what == x86_lbr_exclusive_pt && x86_pmu.lbr_pt_coexist)
> >  		return 0;
> 
> This would also allow PT & BTS at the same time, is that a supported
> configuration?

Yes it is on Goldmont.

-Andi