From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934902AbcLTW5F (ORCPT ); Tue, 20 Dec 2016 17:57:05 -0500 Received: from smtp-out-so.shaw.ca ([64.59.136.138]:37248 "EHLO smtp-out-so.shaw.ca" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932613AbcLTW5D (ORCPT ); Tue, 20 Dec 2016 17:57:03 -0500 X-Authority-Analysis: v=2.2 cv=UeUhcOaN c=1 sm=1 tr=0 a=6xzog4CasRozao6qlzTIAw==:117 a=6xzog4CasRozao6qlzTIAw==:17 a=n5n_aSjo0skA:10 a=Q-fNiiVtAAAA:8 a=VwQbUJbxAAAA:8 a=sIIz2YkaCqr3dMNX2_AA:9 a=Fp8MccfUoT0GBdDC_Lng:22 a=AjGcO6oz07-iQ99wixmX:22 From: Markus Mayer To: Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , Viresh Kumar , "Rafael J . Wysocki" , Arnd Bergmann Cc: Markus Mayer , Broadcom Kernel List , Linux Clock List , Power Management List , Device Tree List , ARM Kernel List , Linux Kernel Mailing List Subject: [PATCH v4 1/2] dt-bindings: brcm: clocks: add binding for brcmstb-cpu-clk-div Date: Tue, 20 Dec 2016 14:55:29 -0800 Message-Id: <20161220225530.96699-2-code@mmayer.net> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20161220225530.96699-1-code@mmayer.net> References: <20161220225530.96699-1-code@mmayer.net> X-CMAE-Envelope: MS4wfMpC0rplXAH5vfcscf6MFBz+XAZg/B/46TnSxkH6hTb+loVGcGsxGvCfhuONajWzmeIYxoF34Sl8XQJEw7POjzQgU850AmO6qhQX/0I2OgoeK+HWcZkk rCcl6Ga3RGboxuGG+ly4JDAt7P97cFjqeVBxELAkN5VfMyxCzWWg+4iOPQYovp54dcYWJc8Ggd0aI5weX9mkM/Njxld9sGykh4xktWY6QUtCjw6EYb8+JYpk sg/gGYlLsLNoW8eogpv096QcudAY3tNSzkmotzhlRW02Azl1qgHiOSV9ZN+v5xIrP8CmWAvIc7ZVl3a78liLBnEn8dAjz4M5VbQRFB8sUrvnxL8pFGu77v+p UoYT2+xzPI2IknruoV4F6z4G7pY9aMt4YckFK/sAwxVhK+NzjTb7+tCzQ0f2cp+eflpRCzb3fVvKpBNL/34+mMdNhT4vXO1W1ApjlrGnPTyd3p7QyE/ndpo2 u/3BL4JCXxpQm4UKDbzvKCBDwOAv9CcyV7OPnz2/NTfX+AZLUQ39NC04H3fA2EuU7sF6VSKbA2QT4HE4jGgLl+2WkNhE3xv85AGK1MPf7gD0KlRO3x8xgjXG STuqXrtCm305alCWrrbA85yW4aTaVlyFFBcqt/svV4r/Qjs9oGKt5tYWtokYwLhnZ50= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Markus Mayer Add binding document for brcm,brcmstb-cpu-clk-div. Signed-off-by: Markus Mayer --- .../bindings/clock/brcm,brcmstb-cpu-clk-div.txt | 83 ++++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 84 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt diff --git a/Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt b/Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt new file mode 100644 index 0000000..3bc99c5 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt @@ -0,0 +1,83 @@ +The CPU divider node serves as the sole clock for the CPU complex. It supports +power-of-2 clock division, with a divider of "1" as the default highest-speed +setting. + +Required properties: +- compatible: shall be "brcm,brcmstb-cpu-clk-div" +- reg: address and width of the divider configuration register +- #clock-cells: shall be set to 0 +- clocks: phandle of clock provider which provides the source clock + (this would typically be a "fixed-clock" type PLL) +- div-table: list of (raw_value,divider) ordered pairs that correspond to the + allowed clock divider settings +- div-shift-width: least-significant bit position and width of divider value + +Optional properties: +- clocks: additional clocks can be specified if needed +- clock-names: clocks can be named, so they can be looked up + +Example: + sw_scb: sw_scb { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <432000000>; + }; + + fixed0: fixed0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <54000000>; + }; + + cpu_pdiv: cpu_pdiv@f04e0008 { + compatible = "divider-clock"; + #clock-cells = <0>; + reg = <0xf04e0008 0x4>; + bit-shift = <10>; + bit-mask = <0xf>; + index-starts-at-one; + clocks = <&fixed0>; + clock-names = "fixed0"; + }; + + cpu_ndiv_int: cpu_ndiv_int { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <167>; + clocks = <&cpu_pdiv>; + clock-names = "cpu_pdiv"; + }; + + cpu_mdiv_ch0: cpu_mdiv_ch0@f04e0000 { + compatible = "divider-clock"; + #clock-cells = <0>; + reg = <0xf04e0000 0x4>; + bit-shift = <1>; + bit-mask = <0xff>; + index-starts-at-one; + clocks = <&cpu_ndiv_int>; + clock-names = "cpu_ndiv_int"; + }; + + cpupll: cpupll@0 { + #clock-cells = <0>; + clock-frequency = <1503000000>; + compatible = "fixed-clock"; + }; + + cpuclkdiv: cpu-clk-div@0 { + #clock-cells = <0>; + clock-names = "cpupll", + "cpu_mdiv_ch0", + "cpu_ndiv_int", + "sw_scb"; + clocks = <&cpupll, + &cpu_mdiv_ch0, + &cpu_ndiv_int, + &sw_scb>; + compatible = "brcm,brcmstb-cpu-clk-div"; + reg = <0xf03e257c 0x4>; + div-table = <0x00 1>; + div-shift-width = <0 5>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index f6eb97b..5473b31 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2786,6 +2786,7 @@ M: bcm-kernel-feedback-list@broadcom.com L: linux-pm@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt +F: Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt F: drivers/cpufreq/brcmstb* BROADCOM SPECIFIC AMBA DRIVER (BCMA) -- 2.7.4