From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757212AbcLUSds (ORCPT ); Wed, 21 Dec 2016 13:33:48 -0500 Received: from mail-pg0-f66.google.com ([74.125.83.66]:33526 "EHLO mail-pg0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753884AbcLUSdq (ORCPT ); Wed, 21 Dec 2016 13:33:46 -0500 Date: Thu, 22 Dec 2016 04:33:31 +1000 From: Nicholas Piggin To: Linus Torvalds Cc: Peter Zijlstra , Dave Hansen , Bob Peterson , Linux Kernel Mailing List , Steven Whitehouse , Andrew Lutomirski , Andreas Gruenbacher , Mel Gorman , linux-mm Subject: Re: [RFC][PATCH] make global bitlock waitqueues per-node Message-ID: <20161222043331.31aab9cc@roar.ozlabs.ibm.com> In-Reply-To: References: <20161219225826.F8CB356F@viggo.jf.intel.com> <156a5b34-ad3b-d0aa-83c9-109b366c1bdf@linux.intel.com> <20161221080931.GQ3124@twins.programming.kicks-ass.net> <20161221083247.GW3174@twins.programming.kicks-ass.net> Organization: IBM X-Mailer: Claws Mail 3.14.1 (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 21 Dec 2016 10:02:27 -0800 Linus Torvalds wrote: > On Wed, Dec 21, 2016 at 12:32 AM, Peter Zijlstra wrote: > > > > FWIW, here's mine.. compiles and boots on a NUMA x86_64 machine. > > So I like how your patch is smaller, but your patch is also broken. > > First off, the whole contention bit is *not* NUMA-specific. It should > help non-NUMA too, by avoiding the stupid extra cache miss. > > Secondly, CONFIG_NUMA is a broken thing to test anyway, since adding a > bit for the NUMA case can overflow the page flags as far as I can tell > (MIPS seems to support NUMA on 32-bit, for example, but I didn't > really check the Kconfig details). Making it dependent on 64-bit might > be ok (and would fix the issue above - I don't think we really need to > care too much about 32-bit any more) > > But making it conditional at all means that now you have those two > different cases for this, which is a maintenance nightmare. So don't > do it even if we could say "screw 32-bit". > > Anyway, the conditional thing could be fixed by just taking Nick's > patch 1/2, and your patch (with the conditional bits stripped out). > > I do think your approach of just re-using the existing bit waiting > with just a page-specific waiting function is nicer than Nick's "let's > just roll new waiting functions" approach. It also avoids the extra > initcall. > > Nick, comments? Well yes we should take my patch 1 and use the new bit for this purpose regardless of what way we go with patch 2. I'll reply to that in the other mail. Thanks, Nick