From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753722AbcL2Wow (ORCPT ); Thu, 29 Dec 2016 17:44:52 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:46646 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753159AbcL2Wnu (ORCPT ); Thu, 29 Dec 2016 17:43:50 -0500 DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 1689F6137F Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=cov@codeaurora.org From: Christopher Covington To: Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , Christoffer Dall , Marc Zyngier , Catalin Marinas , Will Deacon , kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, shankerd@codeaurora.org, timur@codeaurora.org Cc: Christopher Covington Subject: [PATCH v2 4/5] arm64: Use __tlbi_dsb() macros in KVM code Date: Thu, 29 Dec 2016 17:43:34 -0500 Message-Id: <20161229224335.13531-4-cov@codeaurora.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20161229224335.13531-1-cov@codeaurora.org> References: <20161229224335.13531-1-cov@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Refactor the KVM code to use the newly introduced __tlbi_dsb macros, which will allow an errata workaround that repeats tlbi dsb sequences to only change one location. This is not intended to change the generated assembly and comparing before and after vmlinux objdump shows no functional changes. Signed-off-by: Christopher Covington --- arch/arm64/kvm/hyp/tlb.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/arch/arm64/kvm/hyp/tlb.c b/arch/arm64/kvm/hyp/tlb.c index 88e2f2b..66e3f72 100644 --- a/arch/arm64/kvm/hyp/tlb.c +++ b/arch/arm64/kvm/hyp/tlb.c @@ -16,6 +16,7 @@ */ #include +#include void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) { @@ -32,7 +33,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) * whole of Stage-1. Weep... */ ipa >>= 12; - asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa)); + __tlbi_dsb(ipas2e1is, ish, ipa); /* * We have to ensure completion of the invalidation at Stage-2, @@ -40,9 +41,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) * complete (S1 + S2) walk based on the old Stage-2 mapping if * the Stage-1 invalidation happened first. */ - dsb(ish); - asm volatile("tlbi vmalle1is" : : ); - dsb(ish); + __tlbi_dsb(vmalle1is, ish); isb(); write_sysreg(0, vttbr_el2); @@ -57,8 +56,7 @@ void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm) write_sysreg(kvm->arch.vttbr, vttbr_el2); isb(); - asm volatile("tlbi vmalls12e1is" : : ); - dsb(ish); + __tlbi_dsb(vmalls12e1is, ish); isb(); write_sysreg(0, vttbr_el2); @@ -72,8 +70,7 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu) write_sysreg(kvm->arch.vttbr, vttbr_el2); isb(); - asm volatile("tlbi vmalle1" : : ); - dsb(nsh); + __tlbi_dsb(vmalle1, nsh); isb(); write_sysreg(0, vttbr_el2); @@ -82,7 +79,5 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu) void __hyp_text __kvm_flush_vm_context(void) { dsb(ishst); - asm volatile("tlbi alle1is \n" - "ic ialluis ": : ); - dsb(ish); + __tlbi_asm_dsb("ic ialluis", alle1is, ish); } -- Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.