From: Rob Herring <robh@kernel.org>
To: Minghuan Lian <Minghuan.Lian@nxp.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Marc Zyngier <marc.zyngier@arm.com>,
Jason Cooper <jason@lakedaemon.net>, Roy Zang <roy.zang@nxp.com>,
Mingkai Hu <mingkai.hu@nxp.com>,
Stuart Yoder <stuart.yoder@nxp.com>,
Yang-Leo Li <leoyang.li@nxp.com>, Scott Wood <scott.wood@nxp.com>
Subject: Re: [PATCH 7/9] irqchip/ls-scfg-msi: add LS1046a MSI support
Date: Tue, 3 Jan 2017 11:44:47 -0600 [thread overview]
Message-ID: <20170103174447.cy4b7nafea7s4hwf@rob-hp-laptop> (raw)
In-Reply-To: <1482829985-24421-7-git-send-email-Minghuan.Lian@nxp.com>
On Tue, Dec 27, 2016 at 05:13:03PM +0800, Minghuan Lian wrote:
> LS1046a includes 4 MSIRs, each MSIR is assigned a dedicate GIC
> SPI interrupt and provides 32 MSI interrupts. Compared to previous
> MSI, LS1046a's IBS(interrupt bit select) shift is changed to 2 and
> total MSI interrupt number is changed to 128.
>
> The patch adds structure 'ls_scfg_msir' to describe MSIR setting and
> 'ibs_shift' to store the different value between the SoCs.
>
> Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
> ---
> .../interrupt-controller/fsl,ls-scfg-msi.txt | 2 +-
> drivers/irqchip/irq-ls-scfg-msi.c | 161 ++++++++++++++++-----
> 2 files changed, 127 insertions(+), 36 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt
> index 54597b0..dde4552 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt
> +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-scfg-msi.txt
> @@ -6,7 +6,7 @@ Required properties:
> Layerscape PCIe MSI controller block such as:
> "fsl,ls1021a-msi"
> "fsl,ls1043a-msi"
> - "fsl,ls1046a-msi"
> + "fsl,ls1046a-msi"
This hunk goes in the previous patch...
> - msi-controller: indicates that this is a PCIe MSI controller node
> - reg: physical base address of the controller and length of memory mapped.
> - interrupts: an interrupt to the parent interrupt controller.
next prev parent reply other threads:[~2017-01-03 17:46 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-27 9:12 [PATCH 1/9] irqchip/ls-scfg-msi: fix typo of MSI compatible strings Minghuan Lian
2016-12-27 9:12 ` [PATCH 2/9] arm: dts: ls1021a: fix typo of MSI compatible string Minghuan Lian
2016-12-27 9:12 ` [PATCH 3/9] arm64: dts: ls1043a: " Minghuan Lian
2016-12-27 9:13 ` [PATCH 4/9] arm: dts: ls1021a: share all MSIs Minghuan Lian
2016-12-27 9:13 ` [PATCH 5/9] arm64: dts: ls1043a: " Minghuan Lian
2016-12-27 9:13 ` [PATCH 6/9] arm64: dts: ls1046a: add MSI dts node Minghuan Lian
2017-01-03 17:12 ` Rob Herring
2017-01-05 8:05 ` M.H. Lian
2016-12-27 9:13 ` [PATCH 7/9] irqchip/ls-scfg-msi: add LS1046a MSI support Minghuan Lian
2017-01-03 17:44 ` Rob Herring [this message]
2016-12-27 9:13 ` [PATCH 8/9] irqchip/ls-scfg-msi: add LS1043a v1.1 " Minghuan Lian
2017-01-03 17:46 ` Rob Herring
2016-12-27 9:13 ` [PATCH 9/9] irqchip/ls-scfg-msi: add MSI affinity support Minghuan Lian
2017-01-03 17:11 ` [PATCH 1/9] irqchip/ls-scfg-msi: fix typo of MSI compatible strings Rob Herring
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