From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1763065AbdAERTZ (ORCPT ); Thu, 5 Jan 2017 12:19:25 -0500 Received: from foss.arm.com ([217.140.101.70]:55836 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1761728AbdAERS3 (ORCPT ); Thu, 5 Jan 2017 12:18:29 -0500 Date: Thu, 5 Jan 2017 17:18:24 +0000 From: Catalin Marinas To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, mark.rutland@arm.com, ryan.arnold@linaro.org, sid@reserved-bit.com, aph@redhat.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, adhemerval.zanella@linaro.org, dave.martin@arm.com Subject: Re: [PATCH v3 3/9] arm64: cpufeature: Cleanup feature bit tables Message-ID: <20170105171824.GE29765@e104818-lin.cambridge.arm.com> References: <1483552147-9605-1-git-send-email-suzuki.poulose@arm.com> <1483552147-9605-4-git-send-email-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1483552147-9605-4-git-send-email-suzuki.poulose@arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jan 04, 2017 at 05:49:01PM +0000, Suzuki K. Poulose wrote: > This patch does the following clean ups : > > 1) All undescribed fields of a register are now treated as "strict" > with a safe value of 0. Hence we could leave an empty table for > describing registers which are RAZ. > > 2) ID_AA64DFR1_EL1 is RAZ and should use the table for RAZ register. > > 3) ftr_generic32 is used to represent a register with a 32bit feature > value. Rename this to ftr_singl32 to make it more obvious. Since > we don't have a 64bit singe feature register, kill ftr_generic. Nitpick: couple of "single" typos above. > > Based on a patch by Mark Rutland. > > Cc: Catalin Marinas > Cc: Will Deacon > Reviewed-by: Mark Rutland > Signed-off-by: Suzuki K Poulose Reviewed-by: Catalin Marinas