From: Wenyou Yang <wenyou.yang@atmel.com>
To: Alexandre Belloni <alexandre.belloni@free-electrons.com>,
Russell King <linux@arm.linux.org.uk>,
Nicolas Ferre <nicolas.ferre@atmel.com>,
"Rob Herring" <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: <linux-kernel@vger.kernel.org>,
Wenyou Yang <wenyou.yang@microchip.com>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
"Wenyou Yang" <wenyou.yang@atmel.com>
Subject: [PATCH 3/3] ARM: dts: at91: use "atmel,sama5d4-ddramc" for ramc
Date: Fri, 6 Jan 2017 14:59:47 +0800 [thread overview]
Message-ID: <20170106065947.30631-4-wenyou.yang@atmel.com> (raw)
In-Reply-To: <20170106065947.30631-1-wenyou.yang@atmel.com>
Use the new compatible "atmel,sama5d4-ddramc" for the ramc of
SAMA5D2 and SAMA5D4.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
---
arch/arm/boot/dts/sama5d2.dtsi | 2 +-
arch/arm/boot/dts/sama5d4.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index ceb9783ff7e1..b5259d85737d 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -380,7 +380,7 @@
};
ramc0: ramc@f000c000 {
- compatible = "atmel,sama5d3-ddramc";
+ compatible = "atmel,sama5d4-ddramc";
reg = <0xf000c000 0x200>;
clocks = <&ddrck>, <&mpddr_clk>;
clock-names = "ddrck", "mpddr";
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index 4f60c1b7b137..603ba986858c 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -370,7 +370,7 @@
};
ramc0: ramc@f0010000 {
- compatible = "atmel,sama5d3-ddramc";
+ compatible = "atmel,sama5d4-ddramc";
reg = <0xf0010000 0x200>;
clocks = <&ddrck>, <&mpddr_clk>;
clock-names = "ddrck", "mpddr";
--
2.11.0
prev parent reply other threads:[~2017-01-06 7:05 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-06 6:59 [PATCH 0/3] ARM: at91: fix cpuidle crash on SAMA5D4 Xplained board Wenyou Yang
2017-01-06 6:59 ` [PATCH 1/3] ARM: at91: flush the L2 cache before entering cpu idle Wenyou Yang
2017-01-06 9:05 ` Alexandre Belloni
2017-01-09 1:47 ` Wenyou.Yang
2017-01-10 16:18 ` Alexandre Belloni
2017-01-10 16:30 ` Alexandre Belloni
2017-01-10 16:50 ` Jean-Jacques Hiblot
2017-01-10 17:22 ` Alexandre Belloni
2017-01-11 8:15 ` Wenyou.Yang
2017-01-11 11:05 ` Jean-Jacques Hiblot
2017-01-11 11:18 ` Russell King - ARM Linux
2017-01-11 13:18 ` Jean-Jacques Hiblot
2017-01-12 1:25 ` Wenyou.Yang
2017-01-06 6:59 ` [PATCH 2/3] doc: binding: add new compatible for SDRAM/DDR Controller Wenyou Yang
2017-01-09 18:45 ` Rob Herring
2017-01-06 6:59 ` Wenyou Yang [this message]
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