From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161860AbdAJRPC (ORCPT ); Tue, 10 Jan 2017 12:15:02 -0500 Received: from foss.arm.com ([217.140.101.70]:59090 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161744AbdAJRO7 (ORCPT ); Tue, 10 Jan 2017 12:14:59 -0500 Date: Tue, 10 Jan 2017 17:15:00 +0000 From: Will Deacon To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, dave.martin@arm.com, aph@redhat.com, ryan.arnold@linaro.org, adhemerval.zanella@linaro.org, sid@reserved-bit.com Subject: Re: [PATCH v4 0/9] arm64: Expose CPUID registers via emulation Message-ID: <20170110171459.GH527@arm.com> References: <1483982912-27215-1-git-send-email-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1483982912-27215-1-git-send-email-suzuki.poulose@arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 09, 2017 at 05:28:23PM +0000, Suzuki K Poulose wrote: > This series adds a new ABI to expose the CPU feature registers > to the user space via emulation of MRS instruction. The system exposes > only a limited set of feature values (See the documentation patch) > from the cpufeature infrastructure. The feature bits that are not > exposed are set to the 'safe value' which implies 'not supported'. > > Apart from the selected feature registers, we expose MIDR_EL1 (Main > ID Register). The user should be aware that, reading MIDR_EL1 can be > tricky on a heterogeneous system (just like getcpu()). We export the > value of the current CPU where 'MRS' is executed. > > Applies on v4.10-rc3. Thanks, I'll queue this for 4.11. Will