From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965386AbdAKKCS (ORCPT ); Wed, 11 Jan 2017 05:02:18 -0500 Received: from mga04.intel.com ([192.55.52.120]:47095 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964959AbdAKKCQ (ORCPT ); Wed, 11 Jan 2017 05:02:16 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,345,1477983600"; d="scan'208";a="1092653676" Date: Wed, 11 Jan 2017 12:02:10 +0200 From: Mika Westerberg To: Lukas Wunner Cc: Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Andreas Noever , linux-pci@vger.kernel.org, linux-pm@vger.kernel.org, Chen Yu , Tomas Winkler , Amir Levy , Bjorn Helgaas , "Rafael J. Wysocki" Subject: Re: [PATCH v4 3/8] PCI: Don't block runtime PM for Thunderbolt host hotplug ports Message-ID: <20170111100210.GL2330@lahna.fi.intel.com> References: <89e0512762e0062ad1f1884ebfaaf71e3b731237.1483806825.git.lukas@wunner.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <89e0512762e0062ad1f1884ebfaaf71e3b731237.1483806825.git.lukas@wunner.de> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.7.1 (2016-10-04) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Jan 08, 2017 at 09:41:45AM +0100, Lukas Wunner wrote: > Hotplug ports generally block their parents from suspending to D3hot as > otherwise their interrupts couldn't be delivered. > > An exception are Thunderbolt host controllers: They have a separate > GPIO pin to side-band signal plug events even if the controller is > powered down or its parent ports are suspended to D3. They can be told > apart from Thunderbolt controllers in attached devices by checking if > they're situated below a non-Thunderbolt device (typically a root port, > or the downstream port of a PCIe switch in the case of the MacPro6,1). > > To enable runtime PM for Thunderbolt on the Mac, the downstream bridges > of a host controller must not block runtime PM on the upstream bridge as > power to the chip is only cut once the upstream bridge has suspended. > Amend the condition in pci_dev_check_d3cold() accordingly. > > Cc: Mika Westerberg > Cc: Rafael J. Wysocki > Cc: Andreas Noever > Cc: Tomas Winkler > Cc: Amir Levy > Signed-off-by: Lukas Wunner > --- > drivers/pci/pci.c | 13 ++++++++++++- > 1 file changed, 12 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index 8ed098d..0b03fe7 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -2271,6 +2271,7 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge) > > static int pci_dev_check_d3cold(struct pci_dev *dev, void *data) > { > + struct pci_dev *parent, *grandparent; > bool *d3cold_ok = data; > > if (/* The device needs to be allowed to go D3cold ... */ > @@ -2284,7 +2285,17 @@ static int pci_dev_check_d3cold(struct pci_dev *dev, void *data) > !pci_power_manageable(dev) || > > /* Hotplug interrupts cannot be delivered if the link is down. */ > - dev->is_hotplug_bridge) > + (dev->is_hotplug_bridge && > + > + /* > + * Exception: Thunderbolt host controllers have a pin to > + * side-band signal plug events. Their hotplug ports are > + * recognizable by having a non-Thunderbolt device as > + * grandparent. > + */ > + !(dev->is_thunderbolt && (parent = pci_upstream_bridge(dev)) && > + (grandparent = pci_upstream_bridge(parent)) && > + !grandparent->is_thunderbolt))) Can you move this to its own helper function? > > *d3cold_ok = false; > > -- > 2.11.0