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From: kbuild test robot <lkp@intel.com>
To: George Cherian <george.cherian@cavium.com>
Cc: kbuild-all@01.org, herbert@gondor.apana.org.au,
	davem@davemloft.net, david.daney@cavium.com,
	clabbe.montjoie@gmail.com, linux-kernel@vger.kernel.org,
	linux-crypto@vger.kernel.org,
	George Cherian <george.cherian@cavium.com>
Subject: Re: [PATCH v4 3/3] drivers: crypto: Enable CPT options crypto for build
Date: Thu, 12 Jan 2017 20:40:09 +0800	[thread overview]
Message-ID: <201701122008.nnjqZMiq%fengguang.wu@intel.com> (raw)
In-Reply-To: <1484132211-917-4-git-send-email-george.cherian@cavium.com>

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Hi George,

[auto build test ERROR on v4.9-rc8]
[cannot apply to cryptodev/master crypto/master sparc-next/master next-20170111]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/George-Cherian/Add-Support-for-Cavium-Cryptographic-Acceleration-Unit/20170112-192240
config: blackfin-allmodconfig (attached as .config)
compiler: bfin-uclinux-gcc (GCC) 6.2.0
reproduce:
        wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=blackfin 

All error/warnings (new ones prefixed by >>):

   In file included from drivers/crypto/cavium/cpt/cptvf.h:13:0,
                    from drivers/crypto/cavium/cpt/cptvf_main.c:12:
   drivers/crypto/cavium/cpt/cpt_common.h: In function 'cpt_write_csr64':
>> drivers/crypto/cavium/cpt/cpt_common.h:151:2: error: implicit declaration of function 'writeq' [-Werror=implicit-function-declaration]
     writeq(val, hw_addr + offset);
     ^~~~~~
   drivers/crypto/cavium/cpt/cpt_common.h: In function 'cpt_read_csr64':
>> drivers/crypto/cavium/cpt/cpt_common.h:156:9: error: implicit declaration of function 'readq' [-Werror=implicit-function-declaration]
     return readq(hw_addr + offset);
            ^~~~~
   In file included from drivers/crypto/cavium/cpt/cptvf_main.c:12:0:
   drivers/crypto/cavium/cpt/cptvf.h: At top level:
>> drivers/crypto/cavium/cpt/cptvf.h:111:20: error: array type has incomplete element type 'struct msix_entry'
     struct msix_entry msix_entries[CPT_VF_MSIX_VECTORS];
                       ^~~~~~~~~~~~
   drivers/crypto/cavium/cpt/cptvf_main.c: In function 'init_worker_threads':
>> drivers/crypto/cavium/cpt/cptvf_main.c:52:9: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
            (u64)cwqe_info);
            ^
   drivers/crypto/cavium/cpt/cptvf_main.c: In function 'cptvf_disable_msix':
>> drivers/crypto/cavium/cpt/cptvf_main.c:375:3: error: implicit declaration of function 'pci_disable_msix' [-Werror=implicit-function-declaration]
      pci_disable_msix(cptvf->pdev);
      ^~~~~~~~~~~~~~~~
   drivers/crypto/cavium/cpt/cptvf_main.c: In function 'cptvf_enable_msix':
>> drivers/crypto/cavium/cpt/cptvf_main.c:387:8: error: implicit declaration of function 'pci_enable_msix' [-Werror=implicit-function-declaration]
     ret = pci_enable_msix(cptvf->pdev, cptvf->msix_entries,
           ^~~~~~~~~~~~~~~
   drivers/crypto/cavium/cpt/cptvf_main.c: At top level:
>> drivers/crypto/cavium/cpt/cptvf_main.c:942:1: warning: data definition has no type or storage class
    module_pci_driver(cptvf_pci_driver);
    ^~~~~~~~~~~~~~~~~
>> drivers/crypto/cavium/cpt/cptvf_main.c:942:1: error: type defaults to 'int' in declaration of 'module_pci_driver' [-Werror=implicit-int]
>> drivers/crypto/cavium/cpt/cptvf_main.c:942:1: warning: parameter names (without types) in function declaration
   drivers/crypto/cavium/cpt/cptvf_main.c:934:26: warning: 'cptvf_pci_driver' defined but not used [-Wunused-variable]
    static struct pci_driver cptvf_pci_driver = {
                             ^~~~~~~~~~~~~~~~
   cc1: some warnings being treated as errors
--
   In file included from drivers/crypto/cavium/cpt/cptvf.h:13:0,
                    from drivers/crypto/cavium/cpt/cptvf_reqmanager.c:9:
   drivers/crypto/cavium/cpt/cpt_common.h: In function 'cpt_write_csr64':
>> drivers/crypto/cavium/cpt/cpt_common.h:151:2: error: implicit declaration of function 'writeq' [-Werror=implicit-function-declaration]
     writeq(val, hw_addr + offset);
     ^~~~~~
   drivers/crypto/cavium/cpt/cpt_common.h: In function 'cpt_read_csr64':
>> drivers/crypto/cavium/cpt/cpt_common.h:156:9: error: implicit declaration of function 'readq' [-Werror=implicit-function-declaration]
     return readq(hw_addr + offset);
            ^~~~~
   In file included from drivers/crypto/cavium/cpt/cptvf_reqmanager.c:9:0:
   drivers/crypto/cavium/cpt/cptvf.h: At top level:
>> drivers/crypto/cavium/cpt/cptvf.h:111:20: error: array type has incomplete element type 'struct msix_entry'
     struct msix_entry msix_entries[CPT_VF_MSIX_VECTORS];
                       ^~~~~~~~~~~~
   cc1: some warnings being treated as errors
--
   In file included from drivers/crypto/cavium/cpt/cptpf.h:12:0,
                    from drivers/crypto/cavium/cpt/cptpf_main.c:18:
   drivers/crypto/cavium/cpt/cpt_common.h: In function 'cpt_write_csr64':
>> drivers/crypto/cavium/cpt/cpt_common.h:151:2: error: implicit declaration of function 'writeq' [-Werror=implicit-function-declaration]
     writeq(val, hw_addr + offset);
     ^~~~~~
   drivers/crypto/cavium/cpt/cpt_common.h: In function 'cpt_read_csr64':
>> drivers/crypto/cavium/cpt/cpt_common.h:156:9: error: implicit declaration of function 'readq' [-Werror=implicit-function-declaration]
     return readq(hw_addr + offset);
            ^~~~~
   In file included from drivers/crypto/cavium/cpt/cptpf_main.c:18:0:
   drivers/crypto/cavium/cpt/cptpf.h: At top level:
>> drivers/crypto/cavium/cpt/cptpf.h:57:20: error: array type has incomplete element type 'struct msix_entry'
     struct msix_entry msix_entries[CPT_PF_MSIX_VECTORS];
                       ^~~~~~~~~~~~
   In file included from include/linux/printk.h:305:0,
                    from include/linux/kernel.h:13,
                    from include/linux/list.h:8,
                    from include/linux/kobject.h:20,
                    from include/linux/device.h:17,
                    from drivers/crypto/cavium/cpt/cptpf_main.c:9:
   drivers/crypto/cavium/cpt/cptpf_main.c: In function 'cpt_ucode_load_fw':
>> drivers/crypto/cavium/cpt/cptpf_main.c:299:39: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
     dev_dbg(dev, "mcode->code = %llx\n", (u64)mcode->code);
                                          ^
   include/linux/dynamic_debug.h:135:9: note: in definition of macro 'dynamic_dev_dbg'
          ##__VA_ARGS__);  \
            ^~~~~~~~~~~
>> drivers/crypto/cavium/cpt/cptpf_main.c:299:2: note: in expansion of macro 'dev_dbg'
     dev_dbg(dev, "mcode->code = %llx\n", (u64)mcode->code);
     ^~~~~~~
>> drivers/crypto/cavium/cpt/cptpf_main.c:300:15: warning: format '%llx' expects argument of type 'long long unsigned int', but argument 4 has type 'dma_addr_t {aka unsigned int}' [-Wformat=]
     dev_dbg(dev, "mcode->phys_base = %llx\n", mcode->phys_base);
                  ^
   include/linux/dynamic_debug.h:134:39: note: in definition of macro 'dynamic_dev_dbg'
      __dynamic_dev_dbg(&descriptor, dev, fmt, \
                                          ^~~
   drivers/crypto/cavium/cpt/cptpf_main.c:300:2: note: in expansion of macro 'dev_dbg'
     dev_dbg(dev, "mcode->phys_base = %llx\n", mcode->phys_base);
     ^~~~~~~
   drivers/crypto/cavium/cpt/cptpf_main.c: In function 'cpt_enable_msix':
>> drivers/crypto/cavium/cpt/cptpf_main.c:344:8: error: implicit declaration of function 'pci_enable_msix' [-Werror=implicit-function-declaration]
     ret = pci_enable_msix(cpt->pdev, cpt->msix_entries, cpt->num_vec);
           ^~~~~~~~~~~~~~~
   drivers/crypto/cavium/cpt/cptpf_main.c: In function 'cpt_disable_msix':
>> drivers/crypto/cavium/cpt/cptpf_main.c:367:3: error: implicit declaration of function 'pci_disable_msix' [-Werror=implicit-function-declaration]
      pci_disable_msix(cpt->pdev);
      ^~~~~~~~~~~~~~~~
   drivers/crypto/cavium/cpt/cptpf_main.c: At top level:
>> drivers/crypto/cavium/cpt/cptpf_main.c:702:1: warning: data definition has no type or storage class
    module_pci_driver(cpt_pci_driver);
    ^~~~~~~~~~~~~~~~~
>> drivers/crypto/cavium/cpt/cptpf_main.c:702:1: error: type defaults to 'int' in declaration of 'module_pci_driver' [-Werror=implicit-int]
>> drivers/crypto/cavium/cpt/cptpf_main.c:702:1: warning: parameter names (without types) in function declaration
   drivers/crypto/cavium/cpt/cptpf_main.c:694:26: warning: 'cpt_pci_driver' defined but not used [-Wunused-variable]
    static struct pci_driver cpt_pci_driver = {
                             ^~~~~~~~~~~~~~
   cc1: some warnings being treated as errors
--
   In file included from drivers/crypto/cavium/cpt/cptpf.h:12:0,
                    from drivers/crypto/cavium/cpt/cptpf_mbox.c:9:
   drivers/crypto/cavium/cpt/cpt_common.h: In function 'cpt_write_csr64':
>> drivers/crypto/cavium/cpt/cpt_common.h:151:2: error: implicit declaration of function 'writeq' [-Werror=implicit-function-declaration]
     writeq(val, hw_addr + offset);
     ^~~~~~
   drivers/crypto/cavium/cpt/cpt_common.h: In function 'cpt_read_csr64':
>> drivers/crypto/cavium/cpt/cpt_common.h:156:9: error: implicit declaration of function 'readq' [-Werror=implicit-function-declaration]
     return readq(hw_addr + offset);
            ^~~~~
   In file included from drivers/crypto/cavium/cpt/cptpf_mbox.c:9:0:
   drivers/crypto/cavium/cpt/cptpf.h: At top level:
>> drivers/crypto/cavium/cpt/cptpf.h:57:20: error: array type has incomplete element type 'struct msix_entry'
     struct msix_entry msix_entries[CPT_PF_MSIX_VECTORS];
                       ^~~~~~~~~~~~
   cc1: some warnings being treated as errors

vim +/writeq +151 drivers/crypto/cavium/cpt/cpt_common.h

655e56eb George Cherian 2017-01-11  145  };
655e56eb George Cherian 2017-01-11  146  
655e56eb George Cherian 2017-01-11  147  /* Register read/write APIs */
655e56eb George Cherian 2017-01-11  148  static inline void cpt_write_csr64(u8 __iomem *hw_addr, u64 offset,
655e56eb George Cherian 2017-01-11  149  				   u64 val)
655e56eb George Cherian 2017-01-11  150  {
655e56eb George Cherian 2017-01-11 @151  	writeq(val, hw_addr + offset);
655e56eb George Cherian 2017-01-11  152  }
655e56eb George Cherian 2017-01-11  153  
655e56eb George Cherian 2017-01-11  154  static inline u64 cpt_read_csr64(u8 __iomem *hw_addr, u64 offset)
655e56eb George Cherian 2017-01-11  155  {
655e56eb George Cherian 2017-01-11 @156  	return readq(hw_addr + offset);
655e56eb George Cherian 2017-01-11  157  }
655e56eb George Cherian 2017-01-11  158  #endif /* __CPT_COMMON_H */

:::::: The code at line 151 was first introduced by commit
:::::: 655e56eb623b2a0851919c7b2c7a9bc1a04af89e drivers: crypto: Add Support for Octeon-tx CPT Engine

:::::: TO: George Cherian <george.cherian@cavium.com>
:::::: CC: 0day robot <fengguang.wu@intel.com>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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  reply	other threads:[~2017-01-12 12:41 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-11 10:56 [PATCH v4 0/3] Add Support for Cavium Cryptographic Acceleration Unit George Cherian
2017-01-11 10:56 ` [PATCH v4 1/3] drivers: crypto: Add Support for Octeon-tx CPT Engine George Cherian
2017-01-11 10:56 ` [PATCH v4 2/3] drivers: crypto: Add the Virtual Function driver for CPT George Cherian
2017-01-11 11:12   ` Stephan Müller
2017-01-11 11:28     ` George Cherian
2017-01-11 12:39       ` Stephan Müller
2017-01-12 11:10         ` George Cherian
2017-01-12 11:19           ` Stephan Müller
2017-01-12 11:20             ` George Cherian
2017-01-11 10:56 ` [PATCH v4 3/3] drivers: crypto: Enable CPT options crypto for build George Cherian
2017-01-12 12:40   ` kbuild test robot [this message]
2017-01-12 13:38   ` kbuild test robot
2017-01-12 13:38   ` [PATCH] drivers: crypto: fix ifnullfree.cocci warnings kbuild test robot
2017-01-12 14:04   ` [PATCH v4 3/3] drivers: crypto: Enable CPT options crypto for build kbuild test robot

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