From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751718AbdASAsF (ORCPT ); Wed, 18 Jan 2017 19:48:05 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:53386 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751504AbdASAsD (ORCPT ); Wed, 18 Jan 2017 19:48:03 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 5EA9E6087A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Wed, 18 Jan 2017 16:47:50 -0800 From: Stephen Boyd To: Chris Packham Cc: linux-arm-kernel@lists.infradead.org, Rob Herring , Mark Rutland , Jason Cooper , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Russell King , Geert Uytterhoeven , Florian Fainelli , Chris Brand , Juri Lelli , Sudeep Holla , Jayachandran C , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCHv4 2/5] arm: mvebu: support for SMP on 98DX3336 SoC Message-ID: <20170119004750.GC4857@codeaurora.org> References: <20170113091222.7132-1-chris.packham@alliedtelesis.co.nz> <20170113091222.7132-3-chris.packham@alliedtelesis.co.nz> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170113091222.7132-3-chris.packham@alliedtelesis.co.nz> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/13, Chris Packham wrote: > diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c > index 46c742d3bd41..59be3ca0464f 100644 > --- a/arch/arm/mach-mvebu/platsmp.c > +++ b/arch/arm/mach-mvebu/platsmp.c > @@ -184,3 +184,89 @@ const struct smp_operations armada_xp_smp_ops __initconst = { > > CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp", > &armada_xp_smp_ops); > + > +struct resume_controller { > + u32 resume_control; > + u32 resume_boot_addr; > +}; > + > +static const struct resume_controller mv98dx3336_resume_controller = { > + .resume_control = 0x08, > + .resume_boot_addr = 0x04, > +}; > + > +static const struct of_device_id of_mv98dx3236_resume_table[] = { > + { > + .compatible = "marvell,98dx3336-resume-ctrl", > + .data = (void *)&mv98dx3336_resume_controller, Useless cast? > + }, > + { /* end of list */ }, > +}; > + > +static int mv98dx3236_resume_set_cpu_boot_addr(int hw_cpu, void *boot_addr) > +{ > + const struct of_device_id *match; > + struct device_node *np; > + void __iomem *base; > + struct resume_controller *rc; > + > + WARN_ON(hw_cpu != 1); > + > + np = of_find_matching_node_and_match(NULL, of_mv98dx3236_resume_table, > + &match); > + if (!np) > + return -ENODEV; > + > + base = of_io_request_and_map(np, 0, of_node_full_name(np)); > + rc = (struct resume_controller *)match->data; Useless cast? > + of_node_put(np); > + if (IS_ERR(base)) > + return PTR_ERR(base); > + > + writel(0, base + rc->resume_control); > + writel(virt_to_phys(boot_addr), base + rc->resume_boot_addr); > + Otherwise Reviewed-by: Stephen Boyd -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project