From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752720AbdA3IzZ (ORCPT ); Mon, 30 Jan 2017 03:55:25 -0500 Received: from mail-out.m-online.net ([212.18.0.9]:35435 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752540AbdA3IzR (ORCPT ); Mon, 30 Jan 2017 03:55:17 -0500 X-Auth-Info: 7CmqIUEXYA1nPcAj0ysRjk2l0f/ZJGbZZc/LZKSNqO0= Date: Mon, 30 Jan 2017 09:55:04 +0100 From: Lukasz Majewski To: Thierry Reding Cc: Sascha Hauer , Stefan Agner , Boris Brezillon , linux-pwm@vger.kernel.org, Bhuvanchandra DV , linux-kernel@vger.kernel.org, Lothar Wassmann , kernel@pengutronix.de, Fabio Estevam , Lukasz Majewski Subject: Re: [PATCH v5 03/11] pwm: imx: Add separate set of pwm ops for PWMv1 and PWMv2 Message-ID: <20170130095504.57e4ee3e@jawa> In-Reply-To: <20170130084513.GO3585@ulmo.ba.sec> References: <1485726855-16236-1-git-send-email-lukma@denx.de> <1485726855-16236-4-git-send-email-lukma@denx.de> <20170130072312.GI3585@ulmo.ba.sec> <20170130074318.GK3585@ulmo.ba.sec> <20170130093649.236e67b1@jawa> <20170130084513.GO3585@ulmo.ba.sec> Organization: denx.de X-Mailer: Claws Mail 3.11.1 (GTK+ 2.24.25; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; boundary="Sig_/guvPsyyFN=jmP/mnLDJR+Oq"; protocol="application/pgp-signature" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --Sig_/guvPsyyFN=jmP/mnLDJR+Oq Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Hi Thierry, > On Mon, Jan 30, 2017 at 09:36:49AM +0100, Lukasz Majewski wrote: > > Hi Thierry, > >=20 > > > On Mon, Jan 30, 2017 at 08:23:12AM +0100, Thierry Reding wrote: > > > > On Sun, Jan 29, 2017 at 10:54:07PM +0100, Lukasz Majewski wrote: > > > > > From: Lukasz Majewski > > > > >=20 > > > > > This patch provides separate set of pwm ops utilized by > > > > > i.MX's PWMv1 and PWMv2. > > > > >=20 > > > > > Signed-off-by: Lothar Wa=C3=9Fmann > > > > > Signed-off-by: Bhuvanchandra DV > > > > > Signed-off-by: Lukasz Majewski > > > > > Acked-by: Shawn Guo > > > > > Reviewed-by: Sascha Hauer > > > > > --- > > > > > Changes for v5: > > > > > - None > > > > >=20 > > > > > Changes for v4: > > > > > - None > > > > >=20 > > > > > Changes for v3: > > > > > - Adjust the code to work with ipg clock removed > > > > >=20 > > > > > Changes for v2: > > > > > - New patch > > > > > --- > > > > > drivers/pwm/pwm-imx.c | 17 ++++++++++++++--- > > > > > 1 file changed, 14 insertions(+), 3 deletions(-) > > > > >=20 > > > > > diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c > > > > > index b1d1e50..0fa480d 100644 > > > > > --- a/drivers/pwm/pwm-imx.c > > > > > +++ b/drivers/pwm/pwm-imx.c > > > > > @@ -239,7 +239,14 @@ static void imx_pwm_disable(struct > > > > > pwm_chip *chip, struct pwm_device *pwm) > > > > > clk_disable_unprepare(imx->clk_per); } > > > > > =20 > > > > > -static struct pwm_ops imx_pwm_ops =3D { > > > > > +static struct pwm_ops imx_pwm_ops_v1 =3D { > > > > > + .enable =3D imx_pwm_enable, > > > > > + .disable =3D imx_pwm_disable, > > > > > + .config =3D imx_pwm_config, > > > > > + .owner =3D THIS_MODULE, > > > > > +}; > > > > > + > > > > > +static struct pwm_ops imx_pwm_ops_v2 =3D { > > > >=20 > > > > Can't these two be const? No need to respin for only this, just > > > > let me know and I can make the change while applying. > > >=20 > > > Nevermind that. I just remembered that I had picked up a patch to > > > make the original imx_pwm_ops a const and things still work fine > > > if I make both of the above const, so I just had to manually > > > apply your patch, but other than that it seems fine. Let me apply > > > the rest of this set and push out. It'd be great if you could > > > check afterwards that it's all still what you expect. > >=20 > > I will do that. Thanks for integrating the patch series :-). >=20 > Thanks for sticking with it. I know the initial patches for optional > polarity support have been around for years, and it took a really long > time for this all to come together. >=20 > But I think the end result is sound and looks really good. You are welcome :-) >=20 > The one remaining bit that I'm not 100% happy about is that the v1 > support is not atomic while the v2 support is. Here the only limitation is the lack of v1 HW. > Not a blocker, but it > looks as if it should be easy to convert over v1 as well. Any takers? >=20 > Thierry Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de --Sig_/guvPsyyFN=jmP/mnLDJR+Oq Content-Type: application/pgp-signature Content-Description: OpenPGP digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iEYEARECAAYFAliO/20ACgkQf9/hG2YwgjGzsQCgshvUpIxZ5MBe/brZ07CBfiMT iusAoKRny5HE47Axx1zfGxt6RwCWSh8t =cGPf -----END PGP SIGNATURE----- --Sig_/guvPsyyFN=jmP/mnLDJR+Oq--