From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754220AbdBPIwB (ORCPT ); Thu, 16 Feb 2017 03:52:01 -0500 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:35581 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753679AbdBPIvA (ORCPT ); Thu, 16 Feb 2017 03:51:00 -0500 From: Chris Packham To: linux-arm-kernel@lists.infradead.org Cc: Chris Packham , Rob Herring , Mark Rutland , Jason Cooper , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Russell King , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 4/6] ARM: dts: mvebu: Add binding for mv98dx3236-soc-id Date: Thu, 16 Feb 2017 21:50:38 +1300 Message-Id: <20170216085041.28337-5-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.11.0.24.ge6920cf In-Reply-To: <20170216085041.28337-1-chris.packham@alliedtelesis.co.nz> References: <20170216085041.28337-1-chris.packham@alliedtelesis.co.nz> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The DFX server on the 98dx3236 and compatible SoCs has an ID register. Add documentation and a binding for this. Signed-off-by: Chris Packham --- Notes: Changes in v3: - new, split from driver .../devicetree/bindings/arm/marvell/mv98dx3236-soc-id.txt | 14 ++++++++++++++ arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 5 +++++ 2 files changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/marvell/mv98dx3236-soc-id.txt diff --git a/Documentation/devicetree/bindings/arm/marvell/mv98dx3236-soc-id.txt b/Documentation/devicetree/bindings/arm/marvell/mv98dx3236-soc-id.txt new file mode 100644 index 000000000000..ed08cb126a83 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/mv98dx3236-soc-id.txt @@ -0,0 +1,14 @@ +Marvell 98dx3236 SoC ID +--------------------------------------------------------------- + +Required properties: + +- compatible: Should be "marvell,mv98dx3236-soc-id". + +- reg: should be the register base and length as documented in the + datasheet for the Device ID Status + +soc-id@f8244 { + compatible = "marvell,mv98dx3236-soc-id"; + reg = <0xf8244 0x4>; +}; diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi index 5e7245524d46..6b81f7363d53 100644 --- a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi +++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi @@ -264,6 +264,11 @@ ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>; reg = ; + soc-id@f8244 { + compatible = "marvell,mv98dx3236-soc-id"; + reg = <0xf8244 0x4>; + }; + dfx_coredivclk: corediv-clock@f8268 { compatible = "marvell,mv98dx3236-corediv-clock"; reg = <0xf8268 0xc>; -- 2.11.0.24.ge6920cf