From: Adrian Fiergolski <adrian.fiergolski@cern.ch>
To: <linux-spi@vger.kernel.org>
Cc: <broonie@kernel.org>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <miguel.ojeda.sandonis@gmail.com>,
Adrian Fiergolski <adrian.fiergolski@cern.ch>
Subject: [PATCH] spi: Add spi-bits-per-word binding.
Date: Mon, 20 Feb 2017 16:35:12 +0100 [thread overview]
Message-ID: <20170220153512.6563-1-adrian.fiergolski@cern.ch> (raw)
In-Reply-To: <20170217101151.hyzmz5a4lgdy7p5m>
If an SPI controller doesn't support 8 bit transfers
(master->bits_per_word_mask), it will be never registered (tested with
spidev):
of_register_spi_device calls spi_add_device which calls spi_setup. The last
takes as an argument spi_device struct, which, in case of spidev, has
bits_per_word set to 0. Thus, the spi_setup function will set it to default
8. Further, the same function will call __spi_validate_bits_per_word which
will fail the whole registration for controllers not supporting 8 bit
transfers (i.e. xilinx-spi).
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@cern.ch>
---
Documentation/devicetree/bindings/spi/spi-bus.txt | 40 ++++++++++++-----------
drivers/spi/spi.c | 18 ++++++++++
2 files changed, 39 insertions(+), 19 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/spi-bus.txt b/Documentation/devicetree/bindings/spi/spi-bus.txt
index 4b1d6e7..8401741 100644
--- a/Documentation/devicetree/bindings/spi/spi-bus.txt
+++ b/Documentation/devicetree/bindings/spi/spi-bus.txt
@@ -43,26 +43,28 @@ cs3 : &gpio1 2 0
SPI slave nodes must be children of the SPI master node and can
contain the following properties.
-- reg - (required) chip select address of device.
-- compatible - (required) name of SPI device following generic names
- recommended practice.
+- reg - (required) chip select address of device.
+- compatible - (required) name of SPI device following generic names
+ recommended practice.
- spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz.
-- spi-cpol - (optional) Empty property indicating device requires
- inverse clock polarity (CPOL) mode.
-- spi-cpha - (optional) Empty property indicating device requires
- shifted clock phase (CPHA) mode.
-- spi-cs-high - (optional) Empty property indicating device requires
- chip select active high.
-- spi-3wire - (optional) Empty property indicating device requires
- 3-wire mode.
-- spi-lsb-first - (optional) Empty property indicating device requires
- LSB first mode.
-- spi-tx-bus-width - (optional) The bus width (number of data wires) that is
- used for MOSI. Defaults to 1 if not present.
-- spi-rx-bus-width - (optional) The bus width (number of data wires) that is
- used for MISO. Defaults to 1 if not present.
-- spi-rx-delay-us - (optional) Microsecond delay after a read transfer.
-- spi-tx-delay-us - (optional) Microsecond delay after a write transfer.
+- spi-cpol - (optional) Empty property indicating device requires
+ inverse clock polarity (CPOL) mode.
+- spi-cpha - (optional) Empty property indicating device requires
+ shifted clock phase (CPHA) mode.
+- spi-cs-high - (optional) Empty property indicating device requires
+ chip select active high.
+- spi-3wire - (optional) Empty property indicating device requires
+ 3-wire mode.
+- spi-lsb-first - (optional) Empty property indicating device requires
+ LSB first mode.
+- spi-tx-bus-width - (optional) The bus width (number of data wires) that is
+ used for MOSI. Defaults to 1 if not present.
+- spi-rx-bus-width - (optional) The bus width (number of data wires) that is
+ used for MISO. Defaults to 1 if not present.
+- spi-rx-delay-us - (optional) Microsecond delay after a read transfer.
+- spi-tx-delay-us - (optional) Microsecond delay after a write transfer.
+- spi-bits-per-word - (optional) Word size for a data transfer. Defaults is 8
+ if not present.
Some SPI controllers and devices support Dual and Quad SPI transfer mode.
It allows data in the SPI system to be transferred using 2 wires (DUAL) or 4
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 656dd3e..57fe058 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -1594,6 +1594,17 @@ of_register_spi_device(struct spi_master *master, struct device_node *nc)
}
spi->max_speed_hz = value;
+ /* Device bits-per-word */
+ if (!of_property_read_u32(nc, "spi-bits-per-word", &value)) {
+ if (value > 32)
+ dev_warn(&master->dev,
+ "bits-per-word %d not supported\n",
+ value);
+ else
+ spi->bits_per_word = value;
+ }
+
+
/* Store a pointer to the node in the device structure */
of_node_get(nc);
spi->dev.of_node = nc;
@@ -1673,6 +1684,13 @@ static int acpi_spi_add_resource(struct acpi_resource *ares, void *data)
spi->max_speed_hz = sb->connection_speed;
+ if (sb->data_bit_length > 32)
+ dev_warn(&master->dev,
+ "bits-per-word %d not supported\n",
+ sb->data_bit_length);
+ else
+ spi->bits_per_word = sb->data_bit_length;
+
if (sb->clock_phase == ACPI_SPI_SECOND_PHASE)
spi->mode |= SPI_CPHA;
if (sb->clock_polarity == ACPI_SPI_START_HIGH)
--
2.9.3
next parent reply other threads:[~2017-02-20 15:36 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20170217101151.hyzmz5a4lgdy7p5m>
2017-02-20 15:35 ` Adrian Fiergolski [this message]
2017-02-21 19:08 ` [PATCH] spi: Add spi-bits-per-word binding Mark Brown
2017-03-13 17:25 ` Adrian Fiergolski
2017-03-13 17:55 ` Mark Brown
2017-03-13 18:12 ` Adrian Fiergolski
2017-03-13 19:57 ` Geert Uytterhoeven
2017-03-13 20:26 ` Adrian Fiergolski
2017-03-17 21:21 ` Mark Brown
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