From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753615AbdCIK6r (ORCPT ); Thu, 9 Mar 2017 05:58:47 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:34596 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751355AbdCIK6Q (ORCPT ); Thu, 9 Mar 2017 05:58:16 -0500 Date: Thu, 9 Mar 2017 11:58:00 +0100 From: Maxime Ripard To: Chen-Yu Tsai Cc: Mike Turquette , Stephen Boyd , dri-devel , Daniel Vetter , David Airlie , Mark Rutland , Rob Herring , devicetree , linux-clk , linux-arm-kernel , linux-kernel , linux-sunxi Subject: Re: [PATCH 10/15] drm/sun4i: tcon: Switch mux on only for composite Message-ID: <20170309105800.mnzhvnky6na7d5vn@lukather> References: <3f70bcfe2ec03188c06d54a262d49ad91963a510.1488876832.git-series.maxime.ripard@free-electrons.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="tjnporxfnr2vegbc" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.6.2-neo (2016-08-21) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --tjnporxfnr2vegbc Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Mar 08, 2017 at 11:51:39AM +0800, Chen-Yu Tsai wrote: > On Tue, Mar 7, 2017 at 4:56 PM, Maxime Ripard > wrote: > > Even though that mux is undocumented, it seems like it needs to be set = to 1 > > when using composite, and 0 when using HDMI. > > > > Signed-off-by: Maxime Ripard > > --- > > drivers/gpu/drm/sun4i/sun4i_tcon.c | 7 ++++++- > > 1 file changed, 6 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i= /sun4i_tcon.c > > index d2335f109601..93249c5ab1e4 100644 > > --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c > > +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c > > @@ -268,11 +268,16 @@ void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon= , struct drm_encoder *encoder, > > SUN4I_TCON_GCTL_IOMAP_MASK, > > SUN4I_TCON_GCTL_IOMAP_TCON1); > > > > + if (encoder->encoder_type =3D=3D DRM_MODE_ENCODER_TVDAC) > > + val =3D 1; > > + else > > + val =3D 0; > > + > > /* > > * FIXME: Undocumented bits > > */ > > if (tcon->quirks->has_unknown_mux) > > - regmap_write(tcon->regs, SUN4I_TCON_MUX_CTRL_REG, 1); > > + regmap_write(tcon->regs, SUN4I_TCON_MUX_CTRL_REG, val); >=20 > We might want to do this the other way around, i.e. exporting >=20 > int sun4i_tcon_mux_set(struct drm_device *drm, int encoder_type, > int pipeline) >=20 > and have downstream encoders call it. For the A31, the mux is not exclusi= vely > used for channel 1; there is a mux setting for MIPI DSI as well, but AFAIK > DSI is connected to channel 0. We could make it part of sun4i_tcon_channel_enable too, though. What do you think? > Additionally, the mux registers are only valid in the first TCON, meaning > it must available be active in 2 pipeline chips. It's also why we'd pass > "struct drm_device *" instead of "struct sun4i_tcon *". Hmmmm. That's going to be tricky to support. Has this been confirmed somehow? Is the register used for something else on TCON1? Thanks, Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com --tjnporxfnr2vegbc Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIcBAEBCAAGBQJYwTU4AAoJEBx+YmzsjxAgs/EP/j9uIG7h7/zm9pyYdUNemM+D P/nBXGzhtsigHxcaDQlGpQ8+yerxSnJLso8d/NXrC4Qf4qvsXl0av1G7daWPL7zU 0s4y9xJo8D0DJ7u//GVA+hpY7BNoabTzRDlOKdzLV0Uqjrlgac8uyxcd1ZHldvr6 hA9/61Oai7Bd4m22gz4+90PERa3NcmkJPUHIOnVFfsGQYq3YbY2bHEq6w3Fkklzt AuMuBS2tzYy0ArX06fmn4ruoAFzxmYXMXkAd7b9cJSaU8vPDsx4q+iZCYduDGiHV Kfg2Jn+H5WX9wQdLbdgS8+TAkARbJw4DvBAjWifcxdJoacgvM3OV3Q6OiQB8G41t WIldQocPpVdFkO4beulKadbGVUhanRGC+IktyR46YRUAe8wpA61FzBMRtcA0gMJ+ jvt+dVJWfIGx3rg2R64gh96+QA+tuvajaBv29IseyMNoaaZNalw0tLfVZMSYYFP7 /em8DvbbbbN6yGDH0dFa0n6e/pK/bItjjReO6SsD0MlxAljU4Odf47YuZIXRbiXT n/ZKU3CQjUfOghXVyFO2aZ5QLETPtp2NeYJsa0wrrpl8KUw7/YcJOreshwjsZiUQ glAI/x6qC9OILYFGUDnajzk+eCU78Jff/i5ce6QdTHNl0mcwFiuIVkBBnOie/jm7 C20ZNe11q2tvUooKed/g =9cmZ -----END PGP SIGNATURE----- --tjnporxfnr2vegbc--