From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757994AbdCUQcl (ORCPT ); Tue, 21 Mar 2017 12:32:41 -0400 Received: from mx1.redhat.com ([209.132.183.28]:53970 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757894AbdCUQci (ORCPT ); Tue, 21 Mar 2017 12:32:38 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com A818D80B56 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=fu.wei@linaro.org DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com A818D80B56 From: fu.wei@linaro.org To: rjw@rjwysocki.net, lenb@kernel.org, daniel.lezcano@linaro.org, tglx@linutronix.de, marc.zyngier@arm.com, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, sudeep.holla@arm.com, hanjun.guo@linaro.org Cc: linux-arm-kernel@lists.infradead.org, linaro-acpi@lists.linaro.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, rruigrok@codeaurora.org, harba@codeaurora.org, cov@codeaurora.org, timur@codeaurora.org, graeme.gregory@linaro.org, al.stone@linaro.org, jcm@redhat.com, wei@redhat.com, arnd@arndb.de, catalin.marinas@arm.com, will.deacon@arm.com, Suravee.Suthikulpanit@amd.com, leo.duran@amd.com, wim@iguana.be, linux@roeck-us.net, linux-watchdog@vger.kernel.org, tn@semihalf.com, christoffer.dall@linaro.org, julien.grall@arm.com, Fu Wei Subject: [PATCH v22 02/11] clocksource: arm_arch_timer: separate out device-tree code and remove arch_timer_detect_rate Date: Wed, 22 Mar 2017 00:31:13 +0800 Message-Id: <20170321163122.9183-3-fu.wei@linaro.org> In-Reply-To: <20170321163122.9183-1-fu.wei@linaro.org> References: <20170321163122.9183-1-fu.wei@linaro.org> X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Tue, 21 Mar 2017 16:32:38 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Fu Wei Currently, the counter frequency detection call(arch_timer_detect_rate) includes getting the frequency from the device-tree property, the per-cpu arch-timer and the memory-mapped (MMIO) timer interfaces. But reading device-tree property will be needed only when system boot with device-tree, and reading from the per-cpu arch-timer and the memory-mapped (MMIO) timer interfaces will be needed only when the system initializes the relevant timer. This patch separates out device-tree code, keep them in device-tree init function, and removes arch_timer_detect_rate founction, then uses the arch_timer_get_cntfrq and arch_timer_mem_get_cntfrq directly. Signed-off-by: Fu Wei --- drivers/clocksource/arm_arch_timer.c | 58 +++++++++++++++++++----------------- 1 file changed, 30 insertions(+), 28 deletions(-) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 843f923..29ca7d6 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -560,30 +560,6 @@ static u32 arch_timer_mem_get_cntfrq(void __iomem *cntbase) return readl_relaxed(cntbase + CNTFRQ); } -static void -arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np) -{ - /* Who has more than one independent system counter? */ - if (arch_timer_rate) - return; - - /* - * Try to determine the frequency from the device tree or CNTFRQ, - * if ACPI is enabled, get the frequency from CNTFRQ ONLY. - */ - if (!acpi_disabled || - of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) { - if (cntbase) - arch_timer_rate = arch_timer_mem_get_cntfrq(cntbase); - else - arch_timer_rate = arch_timer_get_cntfrq(); - } - - /* Check the timer frequency. */ - if (arch_timer_rate == 0) - pr_warn("frequency not available\n"); -} - static void arch_timer_banner(unsigned type) { pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n", @@ -958,7 +934,17 @@ static int __init arch_timer_of_init(struct device_node *np) for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++) arch_timer_ppi[i] = irq_of_parse_and_map(np, i); - arch_timer_detect_rate(NULL, np); + /* + * Try to determine the frequency from the device tree, + * if fail, get the frequency from the sysreg CNTFRQ. + */ + if (!arch_timer_rate && + of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) + arch_timer_rate = arch_timer_get_cntfrq(); + if (!arch_timer_rate) { + pr_err(FW_BUG "frequency not available.\n"); + return -EINVAL; + } arch_timer_c3stop = !of_property_read_bool(np, "always-on"); @@ -1069,7 +1055,19 @@ static int __init arch_timer_mem_init(struct device_node *np) goto out; } - arch_timer_detect_rate(base, np); + /* + * Try to determine the frequency from the device tree, + * if fail, get the frequency from the CNTFRQ reg of MMIO timer. + */ + if (!arch_timer_rate && + of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) + arch_timer_rate = arch_timer_mem_get_cntfrq(base); + if (!arch_timer_rate) { + pr_err(FW_BUG "MMIO frequency not available.\n"); + ret = -EINVAL; + goto out; + } + ret = arch_timer_mem_register(base, irq); if (ret) goto out; @@ -1130,8 +1128,12 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt, gtdt->non_secure_el2_flags); - /* Get the frequency from CNTFRQ */ - arch_timer_detect_rate(NULL, NULL); + /* Get the frequency from the sysreg CNTFRQ */ + arch_timer_rate = arch_timer_get_cntfrq(); + if (!arch_timer_rate) { + pr_err(FW_BUG "frequency not available.\n"); + return -EINVAL; + } arch_timer_uses_ppi = arch_timer_select_ppi(); if (!arch_timer_ppi[arch_timer_uses_ppi]) { -- 2.9.3