From: Icenowy Zheng <icenowy@aosc.io>
To: Rob Herring <robh+dt@kernel.org>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@siol.net>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-sunxi@googlegroups.com, Icenowy Zheng <icenowy@aosc.xyz>
Subject: [PATCH v3 03/11] dt-bindings: add bindings for DE2 on V3s SoC
Date: Thu, 30 Mar 2017 03:46:05 +0800 [thread overview]
Message-ID: <20170329194613.55548-4-icenowy@aosc.io> (raw)
In-Reply-To: <20170329194613.55548-1-icenowy@aosc.io>
From: Icenowy Zheng <icenowy@aosc.xyz>
Allwinner V3s SoC have a display engine which have a different pipeline
with older SoCs.
Add document for it (new compatibles and the new "mixer" part).
The paragraph of TCON is also refactored, for furtherly add TCONs in
A83T/H3/A64/H5 that have only a channel 1 (used for HDMI or TV Encoder).
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
Changes in v3:
- Remove the description of having a BE directly as allwinner,pipeline.
.../bindings/display/sunxi/sun4i-drm.txt | 37 +++++++++++++++++++---
1 file changed, 33 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index b82c00449468..38de5e96f359 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -31,11 +31,11 @@ Required properties:
* allwinner,sun6i-a31-tcon
* allwinner,sun6i-a31s-tcon
* allwinner,sun8i-a33-tcon
+ * allwinner,sun8i-v3s-tcon
- reg: base address and size of memory-mapped region
- interrupts: interrupt associated to this IP
- - clocks: phandles to the clocks feeding the TCON. Three are needed:
+ - clocks: phandles to the clocks feeding the TCON
- 'ahb': the interface clocks
- - 'tcon-ch0': The clock driving the TCON channel 0
- resets: phandles to the reset controllers driving the encoder
- "lcd": the reset line for the TCON channel 0
@@ -52,7 +52,12 @@ Required properties:
second the block connected to the TCON channel 1 (usually the TV
encoder)
-On SoCs other than the A33, there is one more clock required:
+On TCONs that have a channel 0 (currently all TCONs supported), there
+is one more clock required:
+ - 'tcon-ch0': The clock driving the TCON channel 0
+
+On TCONs that have a channel 1 (currently all TCONs except the ones in
+A33 and V3s), there is one more clock required:
- 'tcon-ch1': The clock driving the TCON channel 1
DRC
@@ -137,6 +142,26 @@ Required properties:
Documentation/devicetree/bindings/media/video-interfaces.txt. The
first port should be the input endpoints, the second one the outputs
+Display Engine 2.0 Mixer
+------------------------
+
+The DE2 mixer have many functionalities, currently only layer blending is
+supported.
+
+Required properties:
+ - compatible: value must be one of:
+ * allwinner,sun8i-v3s-de2-mixer
+ - reg: base address and size of the memory-mapped region.
+ - clocks: phandles to the clocks feeding the frontend and backend
+ * bus: the backend interface clock
+ * ram: the backend DRAM clock
+ - clock-names: the clock names mentioned above
+ - resets: phandles to the reset controllers driving the backend
+
+- ports: A ports node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt. The
+ first port should be the input endpoints, the second one the output
+
Display Engine Pipeline
-----------------------
@@ -151,9 +176,13 @@ Required properties:
* allwinner,sun6i-a31-display-engine
* allwinner,sun6i-a31s-display-engine
* allwinner,sun8i-a33-display-engine
+ * allwinner,sun8i-v3s-display-engine
- allwinner,pipelines: list of phandle to the display engine
- frontends available.
+ pipeline entry point. For SoCs with original DE (currently
+ all SoCs supported by display engine except V3s), this
+ phandle should be a display frontend; for SoCs with DE2,
+ this phandle should be a mixer.
Example:
--
2.12.0
next prev parent reply other threads:[~2017-03-29 19:48 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-29 19:46 [PATCH v3 00/11] Initial Allwinner Display Engine 2.0 Support Icenowy Zheng
2017-03-29 19:46 ` [PATCH v3 01/11] dt-bindings: add binding for the Allwinner DE2 CCU Icenowy Zheng
2017-04-03 15:33 ` Rob Herring
2017-03-29 19:46 ` [PATCH v3 02/11] clk: sunxi-ng: add support for " Icenowy Zheng
2017-03-29 19:46 ` Icenowy Zheng [this message]
2017-04-03 8:00 ` [PATCH v3 03/11] dt-bindings: add bindings for DE2 on V3s SoC Maxime Ripard
2017-03-29 19:46 ` [PATCH v3 04/11] drm/sun4i: abstract the layer type Icenowy Zheng
2017-04-03 8:14 ` Maxime Ripard
2017-04-03 10:51 ` Chen-Yu Tsai
2017-04-04 19:28 ` Sean Paul
[not found] ` <dbf0f478-ff53-0ced-24a3-e9de7077efd9@aosc.io>
2017-04-05 2:27 ` [linux-sunxi] " Chen-Yu Tsai
2017-04-05 17:14 ` icenowy
2017-03-29 19:46 ` [PATCH v3 05/11] drm/sun4i: abstract a mixer type Icenowy Zheng
2017-04-03 8:24 ` Maxime Ripard
2017-03-29 19:46 ` [PATCH v3 06/11] drm/sun4i: add support for Allwinner DE2 mixers Icenowy Zheng
2017-03-29 22:33 ` [linux-sunxi] " Jernej Škrabec
2017-03-29 19:46 ` [PATCH v3 07/11] drm/sun4i: Add compatible string for V3s display engine Icenowy Zheng
2017-03-29 19:46 ` [PATCH v3 08/11] drm/sun4i: tcon: add support for V3s TCON Icenowy Zheng
2017-03-29 19:46 ` [PATCH v3 09/11] ARM: dts: sun8i: add DE2 nodes for V3s SoC Icenowy Zheng
2017-03-29 19:46 ` [PATCH v3 10/11] ARM: dts: sun8i: add pinmux for LCD pins of " Icenowy Zheng
2017-03-29 19:46 ` [PATCH v3 11/11] [DO NOT MERGE] ARM: dts: sun8i: enable LCD panel of Lichee Pi Zero Icenowy Zheng
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