[PATCH 00/11] AXP803 PMIC support for Pine64

[PATCH 00/11] AXP803 PMIC support for Pine64

[Icenowy Zheng]

The Pine64 (including Pine64+) boards have an AXP803 PMIC, which is a PMIC
similar to AXP288, but tweaked to use with Allwinner SoCs rather than Intel
tablets (with DCIN and Vbus re-splitted like other AXP PMICs, and RSB bus
support added).

This patchset adds support for it and enabled it in Pine64 device tree.

This patchset can be splitted into two big parts:

- Part1: PATCH 1/11 to PATCH 5/11, which are enabling the MFD (and the
  power key functionality) of AXP803.

- Part2: PATCH 6/11 to PATCH 11/11, which are enabling the regulator
  function of the AXP803 PMIC. Finally Wi-Fi function is added
  as a usage of regulators function.

PATCH 1 and 2 added RSB and NMI device nodes, which are used for the
communication between A64 and AXP803.

PATCH 3 adds basical devicetree binding for AXP803.

PATCH 4 adds support for the AXP803 variant in axp20x-rsb mfd driver.

PATCH 5 enabled the AXP803 MFD in Pine64 device tree.

PATCH 6 adds devicetree binding for the regulators in AXP803.

PATCH 7 adds support for the regulators in AXP803 in the axp20x-regulator
driver.

PATCH 8 enabled the regulator MFD cell in AXP803.

PATCH 9 adds a DTSI file for AXP803, just like what have been done for other
AXPs.

PATCH 10 enabled the regulators on Pine64.

PATCH 11 enabled Wi-Fi support on Pine64, which required DLDO4 and ELDO1
regulators.

Icenowy Zheng (11):
  arm64: allwinner: a64: enable RSB on A64
  arm64: allwinner: a64: add NMI controller on A64
  dt-bindings: add device tree binding for X-Powers AXP803 PMIC
  mfd: axp20x: support AXP803 variant
  arm64: allwinner: a64: add AXP803 node to Pine64 device tree
  dt-bindings: add AXP803's regulator info
  regulator: axp20x-regulator: add support for AXP803
  mfd: axp20x: add axp20x-regulator cell for AXP803
  arm64: allwinner: a64: add DTSI file for AXP803 PMIC
  arm64: allwinner: a64: enable AXP803 regulators for Pine64
  arm64: allwinner: a64: enable Wi-Fi for Pine64

 Documentation/devicetree/bindings/mfd/axp20x.txt   |  30 ++++-
 arch/arm64/boot/dts/allwinner/axp803.dtsi          | 150 +++++++++++++++++++++
 .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 136 +++++++++++++++++++
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi      |  29 ++++
 drivers/mfd/axp20x-rsb.c                           |   1 +
 drivers/mfd/axp20x.c                               | 115 ++++++++++++++++
 drivers/regulator/axp20x-regulator.c               | 135 +++++++++++++++++--
 include/linux/mfd/axp20x.h                         |  77 ++++++++++-
 8 files changed, 657 insertions(+), 16 deletions(-)
 create mode 100644 arch/arm64/boot/dts/allwinner/axp803.dtsi

-- 
2.12.2

[PATCH 01/11] arm64: allwinner: a64: enable RSB on A64

[Icenowy Zheng]

Allwinner A64 have a RSB controller like the one on A23/A33 SoCs.

Add it and its pinmux.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 6bc606b4d74d..9a75b1c7c91a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -420,6 +420,27 @@
 			#gpio-cells = <3>;
 			interrupt-controller;
 			#interrupt-cells = <3>;
+
+			r_rsb_pins: rsb@0 {
+				pins = "PL0", "PL1";
+				function = "s_rsb";
+				drive-strength = <20>;
+				bias-pull-up;
+			};
+		};
+
+		r_rsb: rsb@1f03400 {
+			compatible = "allwinner,sun8i-a23-rsb";
+			reg = <0x01f03400 0x400>;
+			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&r_ccu 6>;
+			clock-frequency = <3000000>;
+			resets = <&r_ccu 2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&r_rsb_pins>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
 		};
 	};
 };
-- 
2.12.2

[PATCH 02/11] arm64: allwinner: a64: add NMI controller on A64

[Icenowy Zheng]

Allwinner A64 SoC features a NMI controller, which is usually connected
to the AXP PMIC.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 9a75b1c7c91a..f907a64e6f0c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -401,6 +401,14 @@
 				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		nmi_intc: interrupt-controller@01f00c0c {
+			compatible = "allwinner,sun6i-a31-sc-nmi";
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			reg = <0x01f00c0c 0x38>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		r_ccu: clock@1f01400 {
 			compatible = "allwinner,sun50i-a64-r-ccu";
 			reg = <0x01f01400 0x100>;
-- 
2.12.2

[PATCH 03/11] dt-bindings: add device tree binding for X-Powers AXP803 PMIC

[Icenowy Zheng]

AXP803 is a PMIC produced by Shenzhen X-Powers, with either I2C or RSB
bus.

Add a compatible for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 Documentation/devicetree/bindings/mfd/axp20x.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
index b41d2601c6ba..31607631b0d8 100644
--- a/Documentation/devicetree/bindings/mfd/axp20x.txt
+++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
@@ -7,11 +7,12 @@ axp209 (X-Powers)
 axp221 (X-Powers)
 axp223 (X-Powers)
 axp809 (X-Powers)
+axp803 (X-Powers)
 
 Required properties:
 - compatible: "x-powers,axp152", "x-powers,axp202", "x-powers,axp209",
 	      "x-powers,axp221", "x-powers,axp223", "x-powers,axp806",
-	      "x-powers,axp809"
+	      "x-powers,axp809", "x-powers,axp803"
 - reg: The I2C slave address or RSB hardware address for the AXP chip
 - interrupt-parent: The parent interrupt controller
 - interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
-- 
2.12.2

[PATCH 04/11] mfd: axp20x: support AXP803 variant

[Icenowy Zheng]

AXP803 is a new PMIC chip produced by X-Powers, usually paired with A64
via RSB bus. The PMIC itself is like AXP288, but with RSB support and
dedicated VBUS and ACIN.

Add support for it in the axp20x mfd driver.

Currently only power key function is supported.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 drivers/mfd/axp20x-rsb.c   |   1 +
 drivers/mfd/axp20x.c       | 113 +++++++++++++++++++++++++++++++++++++++++++++
 include/linux/mfd/axp20x.h |  40 +++++++++++++++-
 3 files changed, 153 insertions(+), 1 deletion(-)

diff --git a/drivers/mfd/axp20x-rsb.c b/drivers/mfd/axp20x-rsb.c
index a732cb50bcff..3ff8a7d1ce88 100644
--- a/drivers/mfd/axp20x-rsb.c
+++ b/drivers/mfd/axp20x-rsb.c
@@ -63,6 +63,7 @@ static const struct of_device_id axp20x_rsb_of_match[] = {
 	{ .compatible = "x-powers,axp223", .data = (void *)AXP223_ID },
 	{ .compatible = "x-powers,axp806", .data = (void *)AXP806_ID },
 	{ .compatible = "x-powers,axp809", .data = (void *)AXP809_ID },
+	{ .compatible = "x-powers,axp803", .data = (void *)AXP803_ID },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, axp20x_rsb_of_match);
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index 5ba3b04cc9b1..e468e08d84db 100644
--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
@@ -43,6 +43,7 @@ static const char * const axp20x_model_names[] = {
 	"AXP288",
 	"AXP806",
 	"AXP809",
+	"AXP803",
 };
 
 static const struct regmap_range axp152_writeable_ranges[] = {
@@ -165,6 +166,32 @@ static const struct regmap_access_table axp806_volatile_table = {
 	.n_yes_ranges	= ARRAY_SIZE(axp806_volatile_ranges),
 };
 
+static const struct regmap_range axp803_writeable_ranges[] = {
+	regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
+	regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
+};
+
+static const struct regmap_range axp803_volatile_ranges[] = {
+	regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON),
+	regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL),
+	regmap_reg_range(AXP288_BC_DET_STAT, AXP288_BC_DET_STAT),
+	regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
+	regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
+	regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
+	regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L),
+	regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG),
+};
+
+static const struct regmap_access_table axp803_writeable_table = {
+	.yes_ranges	= axp803_writeable_ranges,
+	.n_yes_ranges	= ARRAY_SIZE(axp803_writeable_ranges),
+};
+
+static const struct regmap_access_table axp803_volatile_table = {
+	.yes_ranges	= axp803_volatile_ranges,
+	.n_yes_ranges	= ARRAY_SIZE(axp803_volatile_ranges),
+};
+
 static struct resource axp152_pek_resources[] = {
 	DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
 	DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
@@ -278,6 +305,20 @@ static struct resource axp809_pek_resources[] = {
 	},
 };
 
+static struct resource axp803_pek_resources[] = {
+	{
+		.name   = "PEK_DBR",
+		.start  = AXP803_IRQ_PEK_RIS_EDGE,
+		.end    = AXP803_IRQ_PEK_RIS_EDGE,
+		.flags  = IORESOURCE_IRQ,
+	}, {
+		.name   = "PEK_DBF",
+		.start  = AXP803_IRQ_PEK_FAL_EDGE,
+		.end    = AXP803_IRQ_PEK_FAL_EDGE,
+		.flags  = IORESOURCE_IRQ,
+	},
+};
+
 static const struct regmap_config axp152_regmap_config = {
 	.reg_bits	= 8,
 	.val_bits	= 8,
@@ -323,6 +364,15 @@ static const struct regmap_config axp806_regmap_config = {
 	.cache_type	= REGCACHE_RBTREE,
 };
 
+static const struct regmap_config axp803_regmap_config = {
+	.reg_bits	= 8,
+	.val_bits	= 8,
+	.wr_table	= &axp803_writeable_table,
+	.volatile_table	= &axp803_volatile_table,
+	.max_register	= AXP288_FG_TUNE5,
+	.cache_type	= REGCACHE_RBTREE,
+};
+
 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask)			\
 	[_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
 
@@ -507,6 +557,43 @@ static const struct regmap_irq axp809_regmap_irqs[] = {
 	INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT,		4, 0),
 };
 
+static const struct regmap_irq axp803_regmap_irqs[] = {
+	INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V,		0, 7),
+	INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN,		0, 6),
+	INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL,	        0, 5),
+	INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V,		0, 4),
+	INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN,		0, 3),
+	INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL,	        0, 2),
+	INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN,		1, 7),
+	INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL,	        1, 6),
+	INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE,	1, 5),
+	INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE,	1, 4),
+	INIT_REGMAP_IRQ(AXP803, CHARG,		        1, 3),
+	INIT_REGMAP_IRQ(AXP803, CHARG_DONE,		1, 2),
+	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH,	2, 7),
+	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END,	2, 6),
+	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW,	2, 5),
+	INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END,	2, 4),
+	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH,	2, 3),
+	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END,	2, 2),
+	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW,	2, 1),
+	INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END,	2, 0),
+	INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH,	        3, 7),
+	INIT_REGMAP_IRQ(AXP803, GPADC,		        3, 2),
+	INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1,	        3, 1),
+	INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2,	        3, 0),
+	INIT_REGMAP_IRQ(AXP803, TIMER,		        4, 7),
+	INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE,	        4, 6),
+	INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE,	        4, 5),
+	INIT_REGMAP_IRQ(AXP803, PEK_SHORT,		4, 4),
+	INIT_REGMAP_IRQ(AXP803, PEK_LONG,		4, 3),
+	INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF,		4, 2),
+	INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT,		4, 1),
+	INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT,		4, 0),
+	INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG,            5, 1),
+	INIT_REGMAP_IRQ(AXP803, MV_CHNG,                5, 0),
+};
+
 static const struct regmap_irq_chip axp152_regmap_irq_chip = {
 	.name			= "axp152_irq_chip",
 	.status_base		= AXP152_IRQ1_STATE,
@@ -581,6 +668,18 @@ static const struct regmap_irq_chip axp809_regmap_irq_chip = {
 	.num_regs		= 5,
 };
 
+static const struct regmap_irq_chip axp803_regmap_irq_chip = {
+	.name			= "axp803",
+	.status_base		= AXP20X_IRQ1_STATE,
+	.ack_base		= AXP20X_IRQ1_STATE,
+	.mask_base		= AXP20X_IRQ1_EN,
+	.mask_invert		= true,
+	.init_ack_masked	= true,
+	.irqs			= axp803_regmap_irqs,
+	.num_irqs		= ARRAY_SIZE(axp803_regmap_irqs),
+	.num_regs		= 6,
+};
+
 static struct mfd_cell axp20x_cells[] = {
 	{
 		.name		= "axp20x-gpio",
@@ -787,6 +886,14 @@ static struct mfd_cell axp809_cells[] = {
 	},
 };
 
+static struct mfd_cell axp803_cells[] = {
+	{
+		.name			= "axp20x-pek",
+		.num_resources		= ARRAY_SIZE(axp803_pek_resources),
+		.resources		= axp803_pek_resources,
+	}
+};
+
 static struct axp20x_dev *axp20x_pm_power_off;
 static void axp20x_power_off(void)
 {
@@ -867,6 +974,12 @@ int axp20x_match_device(struct axp20x_dev *axp20x)
 		axp20x->regmap_cfg = &axp22x_regmap_config;
 		axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
 		break;
+	case AXP803_ID:
+		axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
+		axp20x->cells = axp803_cells;
+		axp20x->regmap_cfg = &axp803_regmap_config;
+		axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
+		break;
 	default:
 		dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
 		return -EINVAL;
diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
index dc8798cf2a24..b3220ef374d3 100644
--- a/include/linux/mfd/axp20x.h
+++ b/include/linux/mfd/axp20x.h
@@ -22,6 +22,7 @@ enum axp20x_variants {
 	AXP288_ID,
 	AXP806_ID,
 	AXP809_ID,
+	AXP803_ID,
 	NR_AXP20X_VARIANTS,
 };
 
@@ -234,7 +235,7 @@ enum axp20x_variants {
 #define AXP22X_TS_ADC_L			0x59
 #define AXP22X_BATLOW_THRES1		0xe6
 
-/* AXP288 specific registers */
+/* AXP288/AXP803 specific registers */
 #define AXP288_POWER_REASON		0x02
 #define AXP288_BC_GLOBAL		0x2c
 #define AXP288_BC_VBUS_CNTL		0x2d
@@ -525,6 +526,43 @@ enum axp809_irqs {
 	AXP809_IRQ_GPIO0_INPUT,
 };
 
+enum axp803_irqs {
+	AXP803_IRQ_ACIN_OVER_V = 1,
+	AXP803_IRQ_ACIN_PLUGIN,
+	AXP803_IRQ_ACIN_REMOVAL,
+	AXP803_IRQ_VBUS_OVER_V,
+	AXP803_IRQ_VBUS_PLUGIN,
+	AXP803_IRQ_VBUS_REMOVAL,
+	AXP803_IRQ_BATT_PLUGIN,
+	AXP803_IRQ_BATT_REMOVAL,
+	AXP803_IRQ_BATT_ENT_ACT_MODE,
+	AXP803_IRQ_BATT_EXIT_ACT_MODE,
+	AXP803_IRQ_CHARG,
+	AXP803_IRQ_CHARG_DONE,
+	AXP803_IRQ_BATT_CHG_TEMP_HIGH,
+	AXP803_IRQ_BATT_CHG_TEMP_HIGH_END,
+	AXP803_IRQ_BATT_CHG_TEMP_LOW,
+	AXP803_IRQ_BATT_CHG_TEMP_LOW_END,
+	AXP803_IRQ_BATT_ACT_TEMP_HIGH,
+	AXP803_IRQ_BATT_ACT_TEMP_HIGH_END,
+	AXP803_IRQ_BATT_ACT_TEMP_LOW,
+	AXP803_IRQ_BATT_ACT_TEMP_LOW_END,
+	AXP803_IRQ_DIE_TEMP_HIGH,
+	AXP803_IRQ_GPADC,
+	AXP803_IRQ_LOW_PWR_LVL1,
+	AXP803_IRQ_LOW_PWR_LVL2,
+	AXP803_IRQ_TIMER,
+	AXP803_IRQ_PEK_RIS_EDGE,
+	AXP803_IRQ_PEK_FAL_EDGE,
+	AXP803_IRQ_PEK_SHORT,
+	AXP803_IRQ_PEK_LONG,
+	AXP803_IRQ_PEK_OVER_OFF,
+	AXP803_IRQ_GPIO1_INPUT,
+	AXP803_IRQ_GPIO0_INPUT,
+	AXP803_IRQ_BC_USB_CHNG,
+	AXP803_IRQ_MV_CHNG,
+};
+
 struct axp20x_dev {
 	struct device			*dev;
 	int				irq;
-- 
2.12.2

[PATCH 05/11] arm64: allwinner: a64: add AXP803 node to Pine64 device tree

[Icenowy Zheng]

The Pine64 (including Pine64+) boards have an AXP803 as its main PMIC.

Add its device node.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index c680ed385da3..2132d8e6cb3d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -95,6 +95,17 @@
 	status = "okay";
 };
 
+&r_rsb {
+	status = "okay";
+
+	axp803: pmic@3a3 {
+		compatible = "x-powers,axp803";
+		reg = <0x3a3>;
+		interrupt-parent = <&nmi_intc>;
+		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+	};
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pins_a>;
-- 
2.12.2

[PATCH 06/11] dt-bindings: add AXP803's regulator info

[Icenowy Zheng]

AXP803 have the most regulators in currently supported AXP PMICs.

Add info for the regulators in the dt-bindings document.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 Documentation/devicetree/bindings/mfd/axp20x.txt | 27 ++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
index 31607631b0d8..67981bdfd782 100644
--- a/Documentation/devicetree/bindings/mfd/axp20x.txt
+++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
@@ -138,6 +138,33 @@ LDO_IO1		: LDO		: ips-supply		: GPIO 1
 RTC_LDO		: LDO		: ips-supply		: always on
 SW		: On/Off Switch : swin-supply
 
+AXP803 regulators, type, and corresponding input supply names:
+
+Regulator	  Type		  Supply Name		  Notes
+---------	  ----		  -----------		  -----
+DCDC1		: DC-DC buck	: vin1-supply
+DCDC2		: DC-DC buck	: vin2-supply		: poly-phase capable
+DCDC3		: DC-DC	buck	: vin3-supply		: poly-phase capable
+DCDC4		: DC-DC	buck	: vin4-supply
+DCDC5		: DC-DC	buck	: vin5-supply		: poly-phase capable
+DCDC6		: DC-DC	buck	: vin6-supply		: poly-phase capable
+DC1SW		: On/Off Switch	:			: DCDC1 secondary output
+ALDO1		: LDO		: aldoin-supply		: shared supply
+ALDO2		: LDO		: aldoin-supply		: shared supply
+ALDO3		: LDO		: aldoin-supply		: shared supply
+DLDO1		: LDO		: dldoin-supply		: shared supply
+DLDO2		: LDO		: dldoin-supply		: shared supply
+DLDO3		: LDO		: dldoin-supply		: shared supply
+DLDO4		: LDO		: dldoin-supply		: shared supply
+ELDO1		: LDO		: eldoin-supply		: shared supply
+ELDO2		: LDO		: eldoin-supply		: shared supply
+ELDO3		: LDO		: eldoin-supply		: shared supply
+FLDO1		: LDO		: fldoin-supply		: shared supply
+FLDO2		: LDO		: fldoin-supply		: shared supply
+LDO_IO0		: LDO		: ips-supply		: GPIO 0
+LDO_IO1		: LDO		: ips-supply		: GPIO 1
+RTC_LDO		: LDO		: ips-supply		: always on
+
 Example:
 
 axp209: pmic@34 {
-- 
2.12.2

[PATCH 07/11] regulator: axp20x-regulator: add support for AXP803

[Icenowy Zheng]

AXP803 PMIC also have a series of regulators (DCDCs and LDOs)
controllable via I2C/RSB bus.

Add support for them.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 drivers/regulator/axp20x-regulator.c | 135 +++++++++++++++++++++++++++++++----
 include/linux/mfd/axp20x.h           |  37 ++++++++++
 2 files changed, 158 insertions(+), 14 deletions(-)

diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c
index 0b9d4e3e52c7..219a731df392 100644
--- a/drivers/regulator/axp20x-regulator.c
+++ b/drivers/regulator/axp20x-regulator.c
@@ -355,6 +355,81 @@ static const struct regulator_desc axp809_regulators[] = {
 	AXP_DESC_SW(AXP809, SW, "sw", "swin", AXP22X_PWR_OUT_CTRL2, BIT(6)),
 };
 
+static const struct regulator_linear_range axp803_dcdc234_ranges[] = {
+	REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
+	REGULATOR_LINEAR_RANGE(1200000, 0x47, 0x4b, 20000),
+};
+
+static const struct regulator_linear_range axp803_dcdc5_ranges[] = {
+	REGULATOR_LINEAR_RANGE(800000, 0x0, 0x20, 10000),
+	REGULATOR_LINEAR_RANGE(1140000, 0x21, 0x43, 20000),
+};
+
+static const struct regulator_linear_range axp803_dcdc6_ranges[] = {
+	REGULATOR_LINEAR_RANGE(600000, 0x0, 0x32, 10000),
+	REGULATOR_LINEAR_RANGE(1120000, 0x33, 0x47, 20000),
+};
+
+static const struct regulator_linear_range axp803_dldo2_ranges[] = {
+	REGULATOR_LINEAR_RANGE(700000, 0x0, 0x1a, 100000),
+	REGULATOR_LINEAR_RANGE(3400000, 0x1b, 0x1f, 200000),
+};
+
+static const struct regulator_desc axp803_regulators[] = {
+	AXP_DESC(AXP803, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
+		 AXP803_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(0)),
+	AXP_DESC_RANGES(AXP803, DCDC2, "dcdc2", "vin2", axp803_dcdc234_ranges,
+			76, AXP803_DCDC2_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
+			BIT(1)),
+	AXP_DESC_RANGES(AXP803, DCDC3, "dcdc3", "vin3", axp803_dcdc234_ranges,
+			76, AXP803_DCDC3_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
+			BIT(2)),
+	AXP_DESC_RANGES(AXP803, DCDC4, "dcdc4", "vin4", axp803_dcdc234_ranges,
+			76, AXP803_DCDC4_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
+			BIT(3)),
+	AXP_DESC_RANGES(AXP803, DCDC5, "dcdc5", "vin5", axp803_dcdc5_ranges,
+			68, AXP803_DCDC5_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
+			BIT(4)),
+	AXP_DESC_RANGES(AXP803, DCDC6, "dcdc6", "vin6", axp803_dcdc6_ranges,
+			72, AXP803_DCDC6_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
+			BIT(5)),
+	/* secondary switchable output of DCDC1 */
+	AXP_DESC_SW(AXP803, DC1SW, "dc1sw", NULL, AXP22X_PWR_OUT_CTRL2,
+		    BIT(7)),
+	AXP_DESC(AXP803, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
+		 AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(5)),
+	AXP_DESC(AXP803, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
+		 AXP22X_ALDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(6)),
+	AXP_DESC(AXP803, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
+		 AXP22X_ALDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(7)),
+	AXP_DESC(AXP803, DLDO1, "dldo1", "dldoin", 700, 3300, 100,
+		 AXP22X_DLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(3)),
+	AXP_DESC_RANGES(AXP803, DLDO2, "dldo2", "dldoin", axp803_dldo2_ranges,
+			32, AXP22X_DLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2,
+			BIT(4)),
+	AXP_DESC(AXP803, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
+		 AXP22X_DLDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(5)),
+	AXP_DESC(AXP803, DLDO4, "dldo4", "dldoin", 700, 3300, 100,
+		 AXP22X_DLDO4_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(6)),
+	AXP_DESC(AXP803, ELDO1, "eldo1", "eldoin", 700, 1900, 50,
+		 AXP22X_ELDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(0)),
+	AXP_DESC(AXP803, ELDO2, "eldo2", "eldoin", 700, 1900, 50,
+		 AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)),
+	AXP_DESC(AXP803, ELDO3, "eldo3", "eldoin", 700, 1900, 50,
+		 AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)),
+	AXP_DESC(AXP803, FLDO1, "fldo1", "fldoin", 700, 1450, 50,
+		 AXP803_FLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(2)),
+	AXP_DESC(AXP803, FLDO2, "fldo2", "fldoin", 700, 1450, 50,
+		 AXP803_FLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(3)),
+	AXP_DESC_IO(AXP803, LDO_IO0, "ldo_io0", "ips", 700, 3300, 100,
+		    AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07,
+		    AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
+	AXP_DESC_IO(AXP803, LDO_IO1, "ldo_io1", "ips", 700, 3300, 100,
+		    AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07,
+		    AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
+	AXP_DESC_FIXED(AXP803, RTC_LDO, "rtc_ldo", "ips", 3000),
+};
+
 static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
 {
 	struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
@@ -377,6 +452,13 @@ static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
 		 * (See include/linux/mfd/axp20x.h)
 		 */
 		reg = AXP806_DCDC_FREQ_CTRL;
+	case AXP803_ID:
+		/*
+		 * AXP803 also have DCDC work frequency setting register at a
+		 * different position.
+		 */
+		if (axp20x->variant == AXP803_ID)
+			reg = AXP803_DCDC_FREQ_CTRL;
 	case AXP221_ID:
 	case AXP223_ID:
 	case AXP809_ID:
@@ -474,7 +556,13 @@ static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 work
 		mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP22X_DCDC1);
 		workmode <<= id - AXP22X_DCDC1;
 		break;
+	case AXP803_ID:
+		if (id < AXP803_DCDC1 || id > AXP803_DCDC6)
+			return -EINVAL;
 
+		mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP803_DCDC1);
+		workmode <<= id - AXP803_DCDC1;
+		break;
 	default:
 		/* should not happen */
 		WARN_ON(1);
@@ -492,20 +580,34 @@ static bool axp20x_is_polyphase_slave(struct axp20x_dev *axp20x, int id)
 {
 	u32 reg = 0;
 
-	/* Only AXP806 has poly-phase outputs */
-	if (axp20x->variant != AXP806_ID)
+	/*
+	 * Currently in our supported AXP variants, only AXP806 and AXP803
+	 * have polyphase regulators.
+	 */
+	switch (axp20x->variant) {
+	case AXP806_ID:
+		regmap_read(axp20x->regmap, AXP806_DCDC_MODE_CTRL2, &reg);
+
+		switch (id) {
+		case AXP806_DCDCB:
+			return (((reg & GENMASK(7, 6)) == BIT(6)) ||
+				((reg & GENMASK(7, 6)) == BIT(7)));
+		case AXP806_DCDCC:
+			return ((reg & GENMASK(7, 6)) == BIT(7));
+		case AXP806_DCDCE:
+			return !!(reg & BIT(5));
+		}
+	case AXP803_ID:
+		regmap_read(axp20x->regmap, AXP803_POLYPHASE_CTRL, &reg);
+
+		switch (id) {
+		case AXP803_DCDC3:
+			return !!(reg & BIT(6));
+		case AXP803_DCDC6:
+			return !!(reg & BIT(7));
+		}
+	default:
 		return false;
-
-	regmap_read(axp20x->regmap, AXP806_DCDC_MODE_CTRL2, &reg);
-
-	switch (id) {
-	case AXP806_DCDCB:
-		return (((reg & GENMASK(7, 6)) == BIT(6)) ||
-			((reg & GENMASK(7, 6)) == BIT(7)));
-	case AXP806_DCDCC:
-		return ((reg & GENMASK(7, 6)) == BIT(7));
-	case AXP806_DCDCE:
-		return !!(reg & BIT(5));
 	}
 
 	return false;
@@ -548,6 +650,10 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
 		regulators = axp809_regulators;
 		nregulators = AXP809_REG_ID_MAX;
 		break;
+	case AXP803_ID:
+		regulators = axp803_regulators;
+		nregulators = AXP803_REG_ID_MAX;
+		break;
 	default:
 		dev_err(&pdev->dev, "Unsupported AXP variant: %ld\n",
 			axp20x->variant);
@@ -579,7 +685,8 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
 		 * name.
 		 */
 		if ((regulators == axp22x_regulators && i == AXP22X_DC1SW) ||
-		    (regulators == axp809_regulators && i == AXP809_DC1SW)) {
+		    (regulators == axp809_regulators && i == AXP809_DC1SW) ||
+		    (regulators == axp803_regulators && i == AXP803_DC1SW)) {
 			new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc),
 						GFP_KERNEL);
 			*new_desc = regulators[i];
diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
index b3220ef374d3..858d5b1b43b9 100644
--- a/include/linux/mfd/axp20x.h
+++ b/include/linux/mfd/axp20x.h
@@ -119,6 +119,17 @@ enum axp20x_variants {
 #define AXP806_BUS_ADDR_EXT		0xfe
 #define AXP806_REG_ADDR_EXT		0xff
 
+#define AXP803_POLYPHASE_CTRL		0x14
+#define AXP803_FLDO1_V_OUT		0x1c
+#define AXP803_FLDO2_V_OUT		0x1d
+#define AXP803_DCDC1_V_OUT		0x20
+#define AXP803_DCDC2_V_OUT		0x21
+#define AXP803_DCDC3_V_OUT		0x22
+#define AXP803_DCDC4_V_OUT		0x23
+#define AXP803_DCDC5_V_OUT		0x24
+#define AXP803_DCDC6_V_OUT		0x25
+#define AXP803_DCDC_FREQ_CTRL		0x3b
+
 /* Interrupt */
 #define AXP152_IRQ1_EN			0x40
 #define AXP152_IRQ2_EN			0x41
@@ -350,6 +361,32 @@ enum {
 	AXP809_REG_ID_MAX,
 };
 
+enum {
+	AXP803_DCDC1 = 0,
+	AXP803_DCDC2,
+	AXP803_DCDC3,
+	AXP803_DCDC4,
+	AXP803_DCDC5,
+	AXP803_DCDC6,
+	AXP803_DC1SW,
+	AXP803_ALDO1,
+	AXP803_ALDO2,
+	AXP803_ALDO3,
+	AXP803_DLDO1,
+	AXP803_DLDO2,
+	AXP803_DLDO3,
+	AXP803_DLDO4,
+	AXP803_ELDO1,
+	AXP803_ELDO2,
+	AXP803_ELDO3,
+	AXP803_FLDO1,
+	AXP803_FLDO2,
+	AXP803_RTC_LDO,
+	AXP803_LDO_IO0,
+	AXP803_LDO_IO1,
+	AXP803_REG_ID_MAX,
+};
+
 /* IRQs */
 enum {
 	AXP152_IRQ_LDO0IN_CONNECT = 1,
-- 
2.12.2

[PATCH 08/11] mfd: axp20x: add axp20x-regulator cell for AXP803

[Icenowy Zheng]

As axp20x-regulator now supports AXP803, add a cell for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 drivers/mfd/axp20x.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index e468e08d84db..9065be056b39 100644
--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
@@ -891,6 +891,8 @@ static struct mfd_cell axp803_cells[] = {
 		.name			= "axp20x-pek",
 		.num_resources		= ARRAY_SIZE(axp803_pek_resources),
 		.resources		= axp803_pek_resources,
+	}, {
+		.name			= "axp20x-regulator",
 	}
 };
 
-- 
2.12.2

[PATCH 09/11] arm64: allwinner: a64: add DTSI file for AXP803 PMIC

[Icenowy Zheng]

As nearly all A64 boards are using AXP803 PMIC, add a DTSI file for it,
like the old DTSI files for AXP20x/22x, for the common parts of the
PMIC.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm64/boot/dts/allwinner/axp803.dtsi | 150 ++++++++++++++++++++++++++++++
 1 file changed, 150 insertions(+)
 create mode 100644 arch/arm64/boot/dts/allwinner/axp803.dtsi

diff --git a/arch/arm64/boot/dts/allwinner/axp803.dtsi b/arch/arm64/boot/dts/allwinner/axp803.dtsi
new file mode 100644
index 000000000000..f0e53a7fffbd
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/axp803.dtsi
@@ -0,0 +1,150 @@
+/*
+ * Copyright 2017 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * AXP803 Integrated Power Management Chip
+ * http://files.pine64.org/doc/datasheet/pine64/AXP803_Datasheet_V1.0.pdf
+ */
+
+&axp803 {
+	interrupt-controller;
+	#interrupt-cells = <1>;
+
+	regulators {
+		/* Default work frequency for buck regulators */
+		x-powers,dcdc-freq = <3000>;
+
+		reg_dcdc1: dcdc1 {
+			regulator-name = "dcdc1";
+		};
+
+		reg_dcdc2: dcdc2 {
+			regulator-name = "dcdc2";
+		};
+
+		reg_dcdc3: dcdc3 {
+			regulator-name = "dcdc3";
+		};
+
+		reg_dcdc4: dcdc4 {
+			regulator-name = "dcdc4";
+		};
+
+		reg_dcdc5: dcdc5 {
+			regulator-name = "dcdc5";
+		};
+
+		reg_dcdc6: dcdc6 {
+			regulator-name = "dcdc6";
+		};
+
+		reg_dc1sw: dc1sw {
+			regulator-name = "dc1sw";
+		};
+
+		reg_aldo1: aldo1 {
+			regulator-name = "aldo1";
+		};
+
+		reg_aldo2: aldo2 {
+			regulator-name = "aldo2";
+		};
+
+		reg_aldo3: aldo3 {
+			regulator-name = "aldo3";
+		};
+
+		reg_dldo1: dldo1 {
+			regulator-name = "dldo1";
+		};
+
+		reg_dldo2: dldo2 {
+			regulator-name = "dldo2";
+		};
+
+		reg_dldo3: dldo3 {
+			regulator-name = "dldo3";
+		};
+
+		reg_dldo4: dldo4 {
+			regulator-name = "dldo4";
+		};
+
+		reg_eldo1: eldo1 {
+			regulator-name = "eldo1";
+		};
+
+		reg_eldo2: eldo2 {
+			regulator-name = "eldo2";
+		};
+
+		reg_eldo3: eldo3 {
+			regulator-name = "eldo3";
+		};
+
+		reg_fldo1: fldo1 {
+			regulator-name = "fldo1";
+		};
+
+		reg_fldo2: fldo2 {
+			regulator-name = "fldo2";
+		};
+
+		reg_ldo_io0: ldo_io0 {
+			regulator-name = "ldo_io0";
+			status = "disabled";
+		};
+
+		reg_ldo_io1: ldo_io1 {
+			regulator-name = "ldo_io1";
+			status = "disabled";
+		};
+
+		reg_rtc_ldo: rtc_ldo {
+			/* RTC_LDO is a fixed, always-on regulator */
+			regulator-always-on;
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3000000>;
+			regulator-name = "rtc_ldo";
+		};
+	};
+};
-- 
2.12.2

[PATCH 10/11] arm64: allwinner: a64: enable AXP803 regulators for Pine64

[Icenowy Zheng]

Add support of AXP803 regulators in the Pine64 device tree, in order to
enable many future functionalities, e.g. Wi-Fi.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 109 +++++++++++++++++++++
 1 file changed, 109 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 2132d8e6cb3d..7da074f95065 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -106,6 +106,115 @@
 	};
 };
 
+#include "axp803.dtsi"
+
+&reg_aldo1 {
+	regulator-min-microvolt = <2800000>;
+	regulator-max-microvolt = <2800000>;
+	regulator-name = "vcc-csi";
+};
+
+&reg_aldo2 {
+	regulator-always-on;
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-pl";
+};
+
+&reg_aldo3 {
+	regulator-always-on;
+	regulator-min-microvolt = <2700000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-pll-avcc";
+};
+
+&reg_dc1sw {
+	regulator-name = "vcc-phy";
+};
+
+&reg_dcdc1 {
+	regulator-always-on;
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-3v3";
+};
+
+&reg_dcdc2 {
+	regulator-always-on;
+	regulator-min-microvolt = <1000000>;
+	regulator-max-microvolt = <1300000>;
+	regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+&reg_dcdc5 {
+	regulator-always-on;
+	regulator-min-microvolt = <1500000>;
+	regulator-max-microvolt = <1500000>;
+	regulator-name = "vcc-dram";
+};
+
+&reg_dcdc6 {
+	regulator-always-on;
+	regulator-min-microvolt = <1100000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-sys";
+};
+
+&reg_dldo1 {
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-hdmi";
+};
+
+&reg_dldo2 {
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-mipi";
+};
+
+&reg_dldo3 {
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "avdd-csi";
+};
+
+&reg_dldo4 {
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-wifi";
+};
+
+&reg_eldo1 {
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <1800000>;
+	regulator-name = "cpvdd";
+};
+
+&reg_eldo3 {
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <1800000>;
+	regulator-name = "vdd-1v8-csi";
+};
+
+&reg_fldo1 {
+	regulator-min-microvolt = <1200000>;
+	regulator-max-microvolt = <1200000>;
+	regulator-name = "vcc-1v2-hsic";
+};
+
+&reg_fldo2 {
+	regulator-always-on;
+	regulator-min-microvolt = <1100000>;
+	regulator-max-microvolt = <1100000>;
+	regulator-name = "vdd-cpus";
+};
+
+&reg_rtc_ldo {
+	regulator-name = "vcc-rtc";
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pins_a>;
-- 
2.12.2

[PATCH 11/11] arm64: allwinner: a64: enable Wi-Fi for Pine64

[Icenowy Zheng]

The Wi-Fi modules of Pine64 is powered via DLDO4 and ELDO1 (the latter
one provides I/O voltage).

Add device node for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 7da074f95065..9d90bb32aa87 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -64,6 +64,11 @@
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 	};
+
+	wifi_pwrseq: wifi_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+	};
 };
 
 &ehci1 {
@@ -91,6 +96,17 @@
 	status = "okay";
 };
 
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins>;
+	vmmc-supply = <&reg_dldo4>;
+	vqmmc-supply = <&reg_eldo1>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	non-removable;
+	bus-width = <4>;
+	status = "okay";
+};
+
 &ohci1 {
 	status = "okay";
 };
-- 
2.12.2

Re: [linux-sunxi] [PATCH 01/11] arm64: allwinner: a64: enable RSB on A64

[Chen-Yu Tsai]

On Wed, Apr 5, 2017 at 2:01 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
> Allwinner A64 have a RSB controller like the one on A23/A33 SoCs.
>
> Add it and its pinmux.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> index 6bc606b4d74d..9a75b1c7c91a 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -420,6 +420,27 @@
>                         #gpio-cells = <3>;
>                         interrupt-controller;
>                         #interrupt-cells = <3>;
> +
> +                       r_rsb_pins: rsb@0 {
> +                               pins = "PL0", "PL1";
> +                               function = "s_rsb";
> +                               drive-strength = <20>;

We don't need this. The hardware default should be enough.

> +                               bias-pull-up;

Boards should have external pull-ups for these pins, as the PMICs
start up in I2C mode. If any board actually doesn't have them and
needs the internal pull-ups, they should be set at the board level.

Otherwise,

Acked-by: Chen-Yu Tsai <wens@csie.org>

> +                       };
> +               };
> +
> +               r_rsb: rsb@1f03400 {
> +                       compatible = "allwinner,sun8i-a23-rsb";
> +                       reg = <0x01f03400 0x400>;
> +                       interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&r_ccu 6>;
> +                       clock-frequency = <3000000>;
> +                       resets = <&r_ccu 2>;
> +                       pinctrl-names = "default";
> +                       pinctrl-0 = <&r_rsb_pins>;
> +                       status = "disabled";
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
>                 };
>         };
>  };
> --
> 2.12.2
>
> --
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Re: [linux-sunxi] [PATCH 02/11] arm64: allwinner: a64: add NMI controller on A64

[Chen-Yu Tsai]

On Wed, Apr 5, 2017 at 2:01 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
> Allwinner A64 SoC features a NMI controller, which is usually connected
> to the AXP PMIC.
>
> Add support for it.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>

This might not be the best representation of the R_INTC block. Though
we'd need to change it for all SoCs if we want to be accurate. For now,

Acked-by: Chen-Yu Tsai <wens@csie.org>

Re: [linux-sunxi] [PATCH 03/11] dt-bindings: add device tree binding for X-Powers AXP803 PMIC

[Chen-Yu Tsai]

On Wed, Apr 5, 2017 at 2:01 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
> AXP803 is a PMIC produced by Shenzhen X-Powers, with either I2C or RSB
> bus.
>
> Add a compatible for it.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  Documentation/devicetree/bindings/mfd/axp20x.txt | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt b/Documentation/devicetree/bindings/mfd/axp20x.txt
> index b41d2601c6ba..31607631b0d8 100644
> --- a/Documentation/devicetree/bindings/mfd/axp20x.txt
> +++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
> @@ -7,11 +7,12 @@ axp209 (X-Powers)
>  axp221 (X-Powers)
>  axp223 (X-Powers)
>  axp809 (X-Powers)
> +axp803 (X-Powers)
>
>  Required properties:
>  - compatible: "x-powers,axp152", "x-powers,axp202", "x-powers,axp209",
>               "x-powers,axp221", "x-powers,axp223", "x-powers,axp806",
> -             "x-powers,axp809"
> +             "x-powers,axp809", "x-powers,axp803"

Please sort them in ascending order. Otherwise,

Acked-by: Chen-Yu Tsai <wens@csie.org>

>  - reg: The I2C slave address or RSB hardware address for the AXP chip
>  - interrupt-parent: The parent interrupt controller
>  - interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin
> --
> 2.12.2
>
> --
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Re: [linux-sunxi] [PATCH 02/11] arm64: allwinner: a64: add NMI controller on A64

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 642 bytes --]

On Wed, Apr 05, 2017 at 11:51:45AM +0800, Chen-Yu Tsai wrote:
> On Wed, Apr 5, 2017 at 2:01 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
> > Allwinner A64 SoC features a NMI controller, which is usually connected
> > to the AXP PMIC.
> >
> > Add support for it.
> >
> > Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> 
> This might not be the best representation of the R_INTC block. Though
> we'd need to change it for all SoCs if we want to be accurate. For now,

What do you think would be a good representation?

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [PATCH 10/11] arm64: allwinner: a64: enable AXP803 regulators for Pine64

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 3396 bytes --]

On Wed, Apr 05, 2017 at 02:01:44AM +0800, Icenowy Zheng wrote:
> Add support of AXP803 regulators in the Pine64 device tree, in order to
> enable many future functionalities, e.g. Wi-Fi.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 109 +++++++++++++++++++++
>  1 file changed, 109 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
> index 2132d8e6cb3d..7da074f95065 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
> @@ -106,6 +106,115 @@
>  	};
>  };
>  
> +#include "axp803.dtsi"
> +
> +&reg_aldo1 {
> +	regulator-min-microvolt = <2800000>;
> +	regulator-max-microvolt = <2800000>;
> +	regulator-name = "vcc-csi";
> +};
> +
> +&reg_aldo2 {
> +	regulator-always-on;
> +	regulator-min-microvolt = <1800000>;
> +	regulator-max-microvolt = <3300000>;
> +	regulator-name = "vcc-pl";
> +};
> +
> +&reg_aldo3 {
> +	regulator-always-on;
> +	regulator-min-microvolt = <2700000>;
> +	regulator-max-microvolt = <3300000>;
> +	regulator-name = "vcc-pll-avcc";
> +};
> +
> +&reg_dc1sw {
> +	regulator-name = "vcc-phy";
> +};
> +
> +&reg_dcdc1 {
> +	regulator-always-on;
> +	regulator-min-microvolt = <3300000>;
> +	regulator-max-microvolt = <3300000>;
> +	regulator-name = "vcc-3v3";
> +};
> +
> +&reg_dcdc2 {
> +	regulator-always-on;
> +	regulator-min-microvolt = <1000000>;
> +	regulator-max-microvolt = <1300000>;
> +	regulator-name = "vdd-cpux";
> +};
> +
> +/* DCDC3 is polyphased with DCDC2 */
> +
> +&reg_dcdc5 {
> +	regulator-always-on;
> +	regulator-min-microvolt = <1500000>;
> +	regulator-max-microvolt = <1500000>;
> +	regulator-name = "vcc-dram";
> +};
> +
> +&reg_dcdc6 {
> +	regulator-always-on;
> +	regulator-min-microvolt = <1100000>;
> +	regulator-max-microvolt = <1100000>;
> +	regulator-name = "vdd-sys";
> +};
> +
> +&reg_dldo1 {
> +	regulator-min-microvolt = <3300000>;
> +	regulator-max-microvolt = <3300000>;
> +	regulator-name = "vcc-hdmi";
> +};
> +
> +&reg_dldo2 {
> +	regulator-min-microvolt = <3300000>;
> +	regulator-max-microvolt = <3300000>;
> +	regulator-name = "vcc-mipi";
> +};
> +
> +&reg_dldo3 {
> +	regulator-min-microvolt = <3300000>;
> +	regulator-max-microvolt = <3300000>;
> +	regulator-name = "avdd-csi";
> +};
> +
> +&reg_dldo4 {
> +	regulator-min-microvolt = <3300000>;
> +	regulator-max-microvolt = <3300000>;
> +	regulator-name = "vcc-wifi";
> +};
> +
> +&reg_eldo1 {
> +	regulator-min-microvolt = <1800000>;
> +	regulator-max-microvolt = <1800000>;
> +	regulator-name = "cpvdd";
> +};
> +
> +&reg_eldo3 {
> +	regulator-min-microvolt = <1800000>;
> +	regulator-max-microvolt = <1800000>;
> +	regulator-name = "vdd-1v8-csi";
> +};
> +
> +&reg_fldo1 {
> +	regulator-min-microvolt = <1200000>;
> +	regulator-max-microvolt = <1200000>;
> +	regulator-name = "vcc-1v2-hsic";
> +};
> +
> +&reg_fldo2 {
> +	regulator-always-on;
> +	regulator-min-microvolt = <1100000>;
> +	regulator-max-microvolt = <1100000>;
> +	regulator-name = "vdd-cpus";
> +};

Why do you need to always power the AR100 on?

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [linux-sunxi] [PATCH 02/11] arm64: allwinner: a64: add NMI controller on A64

[Chen-Yu Tsai]

On Wed, Apr 5, 2017 at 2:11 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Wed, Apr 05, 2017 at 11:51:45AM +0800, Chen-Yu Tsai wrote:
>> On Wed, Apr 5, 2017 at 2:01 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
>> > Allwinner A64 SoC features a NMI controller, which is usually connected
>> > to the AXP PMIC.
>> >
>> > Add support for it.
>> >
>> > Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>>
>> This might not be the best representation of the R_INTC block. Though
>> we'd need to change it for all SoCs if we want to be accurate. For now,
>
> What do you think would be a good representation?

My gut feeling is that this is the old INTC from sun4/5i. It's supposed
to be the interrupt controller for the embedded low power core. I've not
done a thorough comparison though.

ChenYu

Re: [linux-sunxi] [PATCH 02/11] arm64: allwinner: a64: add NMI controller on A64

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 1127 bytes --]

On Wed, Apr 05, 2017 at 02:20:31PM +0800, Chen-Yu Tsai wrote:
> On Wed, Apr 5, 2017 at 2:11 PM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > On Wed, Apr 05, 2017 at 11:51:45AM +0800, Chen-Yu Tsai wrote:
> >> On Wed, Apr 5, 2017 at 2:01 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
> >> > Allwinner A64 SoC features a NMI controller, which is usually connected
> >> > to the AXP PMIC.
> >> >
> >> > Add support for it.
> >> >
> >> > Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> >>
> >> This might not be the best representation of the R_INTC block. Though
> >> we'd need to change it for all SoCs if we want to be accurate. For now,
> >
> > What do you think would be a good representation?
> 
> My gut feeling is that this is the old INTC from sun4/5i.

Ah, that would make sense.

> It's supposed to be the interrupt controller for the embedded low
> power core. I've not done a thorough comparison though.

Do we have some documentation / code for this one?

Thanks,
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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Re: [linux-sunxi] [PATCH 02/11] arm64: allwinner: a64: add NMI controller on A64

[Chen-Yu Tsai]

On Wed, Apr 5, 2017 at 3:28 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Wed, Apr 05, 2017 at 02:20:31PM +0800, Chen-Yu Tsai wrote:
>> On Wed, Apr 5, 2017 at 2:11 PM, Maxime Ripard
>> <maxime.ripard@free-electrons.com> wrote:
>> > On Wed, Apr 05, 2017 at 11:51:45AM +0800, Chen-Yu Tsai wrote:
>> >> On Wed, Apr 5, 2017 at 2:01 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
>> >> > Allwinner A64 SoC features a NMI controller, which is usually connected
>> >> > to the AXP PMIC.
>> >> >
>> >> > Add support for it.
>> >> >
>> >> > Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>> >>
>> >> This might not be the best representation of the R_INTC block. Though
>> >> we'd need to change it for all SoCs if we want to be accurate. For now,
>> >
>> > What do you think would be a good representation?
>>
>> My gut feeling is that this is the old INTC from sun4/5i.
>
> Ah, that would make sense.
>
>> It's supposed to be the interrupt controller for the embedded low
>> power core. I've not done a thorough comparison though.
>
> Do we have some documentation / code for this one?

I can't remember where or if I saw any. If Allwinner ever released
any source code for the OpenRISC core we could actually verify it.

However the base address of this block, in addition to the register
offsets found in the driver for "allwinner,sun6i-a31-sc-nmi" do match
up with the sun4i irqchip. The question is if any of the other interrupt
lines are hooked up, and if yes, to what. A possibility would be that
it has all the interrupt lines in the SoC also hooked up, at the same
numbers as the GIC (minus 32). It would feed both the GIC and CPUS.
This is just an educated guess though.

Regards
ChenYu

Re: [linux-sunxi] [PATCH 04/11] mfd: axp20x: support AXP803 variant

[Chen-Yu Tsai]

On Wed, Apr 5, 2017 at 2:01 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
> AXP803 is a new PMIC chip produced by X-Powers, usually paired with A64
> via RSB bus. The PMIC itself is like AXP288, but with RSB support and
> dedicated VBUS and ACIN.
>
> Add support for it in the axp20x mfd driver.
>
> Currently only power key function is supported.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  drivers/mfd/axp20x-rsb.c   |   1 +
>  drivers/mfd/axp20x.c       | 113 +++++++++++++++++++++++++++++++++++++++++++++
>  include/linux/mfd/axp20x.h |  40 +++++++++++++++-
>  3 files changed, 153 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mfd/axp20x-rsb.c b/drivers/mfd/axp20x-rsb.c
> index a732cb50bcff..3ff8a7d1ce88 100644
> --- a/drivers/mfd/axp20x-rsb.c
> +++ b/drivers/mfd/axp20x-rsb.c
> @@ -63,6 +63,7 @@ static const struct of_device_id axp20x_rsb_of_match[] = {
>         { .compatible = "x-powers,axp223", .data = (void *)AXP223_ID },
>         { .compatible = "x-powers,axp806", .data = (void *)AXP806_ID },
>         { .compatible = "x-powers,axp809", .data = (void *)AXP809_ID },
> +       { .compatible = "x-powers,axp803", .data = (void *)AXP803_ID },

As mentioned in the previous patches, please sort them in ascending order.

>         { },
>  };
>  MODULE_DEVICE_TABLE(of, axp20x_rsb_of_match);
> diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
> index 5ba3b04cc9b1..e468e08d84db 100644
> --- a/drivers/mfd/axp20x.c
> +++ b/drivers/mfd/axp20x.c
> @@ -43,6 +43,7 @@ static const char * const axp20x_model_names[] = {
>         "AXP288",
>         "AXP806",
>         "AXP809",
> +       "AXP803",

Same here.

>  };
>
>  static const struct regmap_range axp152_writeable_ranges[] = {
> @@ -165,6 +166,32 @@ static const struct regmap_access_table axp806_volatile_table = {
>         .n_yes_ranges   = ARRAY_SIZE(axp806_volatile_ranges),
>  };
>
> +static const struct regmap_range axp803_writeable_ranges[] = {
> +       regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
> +       regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
> +};
> +
> +static const struct regmap_range axp803_volatile_ranges[] = {
> +       regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON),
> +       regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL),
> +       regmap_reg_range(AXP288_BC_DET_STAT, AXP288_BC_DET_STAT),
> +       regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
> +       regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
> +       regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
> +       regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L),
> +       regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG),
> +};
> +
> +static const struct regmap_access_table axp803_writeable_table = {
> +       .yes_ranges     = axp803_writeable_ranges,
> +       .n_yes_ranges   = ARRAY_SIZE(axp803_writeable_ranges),
> +};
> +
> +static const struct regmap_access_table axp803_volatile_table = {
> +       .yes_ranges     = axp803_volatile_ranges,
> +       .n_yes_ranges   = ARRAY_SIZE(axp803_volatile_ranges),
> +};
> +

If they are the same as the AXP288, please just use that set,
instead of duplicating it. You can add a note, like what I did
for the AXP22x/AXP809.

>  static struct resource axp152_pek_resources[] = {
>         DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
>         DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
> @@ -278,6 +305,20 @@ static struct resource axp809_pek_resources[] = {
>         },
>  };
>
> +static struct resource axp803_pek_resources[] = {
> +       {
> +               .name   = "PEK_DBR",
> +               .start  = AXP803_IRQ_PEK_RIS_EDGE,
> +               .end    = AXP803_IRQ_PEK_RIS_EDGE,
> +               .flags  = IORESOURCE_IRQ,
> +       }, {
> +               .name   = "PEK_DBF",
> +               .start  = AXP803_IRQ_PEK_FAL_EDGE,
> +               .end    = AXP803_IRQ_PEK_FAL_EDGE,
> +               .flags  = IORESOURCE_IRQ,
> +       },
> +};
> +

You can use axp288_power_button_resources directly. See below
about the interrupts and symbol names.

>  static const struct regmap_config axp152_regmap_config = {
>         .reg_bits       = 8,
>         .val_bits       = 8,
> @@ -323,6 +364,15 @@ static const struct regmap_config axp806_regmap_config = {
>         .cache_type     = REGCACHE_RBTREE,
>  };
>
> +static const struct regmap_config axp803_regmap_config = {
> +       .reg_bits       = 8,
> +       .val_bits       = 8,
> +       .wr_table       = &axp803_writeable_table,
> +       .volatile_table = &axp803_volatile_table,
> +       .max_register   = AXP288_FG_TUNE5,
> +       .cache_type     = REGCACHE_RBTREE,
> +};
> +

Drop this and use axp288_regmap_config.

>  #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask)                   \
>         [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
>
> @@ -507,6 +557,43 @@ static const struct regmap_irq axp809_regmap_irqs[] = {
>         INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT,            4, 0),
>  };
>
> +static const struct regmap_irq axp803_regmap_irqs[] = {
> +       INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V,            0, 7),
> +       INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN,            0, 6),
> +       INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL,           0, 5),
> +       INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V,            0, 4),
> +       INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN,            0, 3),
> +       INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL,           0, 2),
> +       INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN,            1, 7),
> +       INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL,           1, 6),
> +       INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE,      1, 5),
> +       INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE,     1, 4),
> +       INIT_REGMAP_IRQ(AXP803, CHARG,                  1, 3),
> +       INIT_REGMAP_IRQ(AXP803, CHARG_DONE,             1, 2),
> +       INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH,     2, 7),
> +       INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6),
> +       INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW,      2, 5),
> +       INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END,  2, 4),
> +       INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH,     2, 3),
> +       INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2),
> +       INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW,      2, 1),
> +       INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END,  2, 0),
> +       INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH,          3, 7),
> +       INIT_REGMAP_IRQ(AXP803, GPADC,                  3, 2),
> +       INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1,           3, 1),
> +       INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2,           3, 0),
> +       INIT_REGMAP_IRQ(AXP803, TIMER,                  4, 7),
> +       INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE,           4, 6),
> +       INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE,           4, 5),
> +       INIT_REGMAP_IRQ(AXP803, PEK_SHORT,              4, 4),
> +       INIT_REGMAP_IRQ(AXP803, PEK_LONG,               4, 3),
> +       INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF,           4, 2),
> +       INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT,            4, 1),
> +       INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT,            4, 0),
> +       INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG,            5, 1),
> +       INIT_REGMAP_IRQ(AXP803, MV_CHNG,                5, 0),
> +};
> +

Looks like the same set as AXP288, albeit with different names.
Please use that set instead of duplicating it. The different naming
scheme is OK, as the symbols really only get used when defining
resources for the various sub-devices.

>  static const struct regmap_irq_chip axp152_regmap_irq_chip = {
>         .name                   = "axp152_irq_chip",
>         .status_base            = AXP152_IRQ1_STATE,
> @@ -581,6 +668,18 @@ static const struct regmap_irq_chip axp809_regmap_irq_chip = {
>         .num_regs               = 5,
>  };
>
> +static const struct regmap_irq_chip axp803_regmap_irq_chip = {
> +       .name                   = "axp803",
> +       .status_base            = AXP20X_IRQ1_STATE,
> +       .ack_base               = AXP20X_IRQ1_STATE,
> +       .mask_base              = AXP20X_IRQ1_EN,
> +       .mask_invert            = true,
> +       .init_ack_masked        = true,
> +       .irqs                   = axp803_regmap_irqs,
> +       .num_irqs               = ARRAY_SIZE(axp803_regmap_irqs),
> +       .num_regs               = 6,
> +};
> +

Same here.

In general we want to be able to share as much as possible.
Otherwise we'd just have separate drivers.

Regards
ChenYu

>  static struct mfd_cell axp20x_cells[] = {
>         {
>                 .name           = "axp20x-gpio",
> @@ -787,6 +886,14 @@ static struct mfd_cell axp809_cells[] = {
>         },
>  };
>
> +static struct mfd_cell axp803_cells[] = {
> +       {
> +               .name                   = "axp20x-pek",
> +               .num_resources          = ARRAY_SIZE(axp803_pek_resources),
> +               .resources              = axp803_pek_resources,
> +       }
> +};
> +
>  static struct axp20x_dev *axp20x_pm_power_off;
>  static void axp20x_power_off(void)
>  {
> @@ -867,6 +974,12 @@ int axp20x_match_device(struct axp20x_dev *axp20x)
>                 axp20x->regmap_cfg = &axp22x_regmap_config;
>                 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
>                 break;
> +       case AXP803_ID:
> +               axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
> +               axp20x->cells = axp803_cells;
> +               axp20x->regmap_cfg = &axp803_regmap_config;
> +               axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
> +               break;
>         default:
>                 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
>                 return -EINVAL;
> diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
> index dc8798cf2a24..b3220ef374d3 100644
> --- a/include/linux/mfd/axp20x.h
> +++ b/include/linux/mfd/axp20x.h
> @@ -22,6 +22,7 @@ enum axp20x_variants {
>         AXP288_ID,
>         AXP806_ID,
>         AXP809_ID,
> +       AXP803_ID,
>         NR_AXP20X_VARIANTS,
>  };
>
> @@ -234,7 +235,7 @@ enum axp20x_variants {
>  #define AXP22X_TS_ADC_L                        0x59
>  #define AXP22X_BATLOW_THRES1           0xe6
>
> -/* AXP288 specific registers */
> +/* AXP288/AXP803 specific registers */
>  #define AXP288_POWER_REASON            0x02
>  #define AXP288_BC_GLOBAL               0x2c
>  #define AXP288_BC_VBUS_CNTL            0x2d
> @@ -525,6 +526,43 @@ enum axp809_irqs {
>         AXP809_IRQ_GPIO0_INPUT,
>  };
>
> +enum axp803_irqs {
> +       AXP803_IRQ_ACIN_OVER_V = 1,
> +       AXP803_IRQ_ACIN_PLUGIN,
> +       AXP803_IRQ_ACIN_REMOVAL,
> +       AXP803_IRQ_VBUS_OVER_V,
> +       AXP803_IRQ_VBUS_PLUGIN,
> +       AXP803_IRQ_VBUS_REMOVAL,
> +       AXP803_IRQ_BATT_PLUGIN,
> +       AXP803_IRQ_BATT_REMOVAL,
> +       AXP803_IRQ_BATT_ENT_ACT_MODE,
> +       AXP803_IRQ_BATT_EXIT_ACT_MODE,
> +       AXP803_IRQ_CHARG,
> +       AXP803_IRQ_CHARG_DONE,
> +       AXP803_IRQ_BATT_CHG_TEMP_HIGH,
> +       AXP803_IRQ_BATT_CHG_TEMP_HIGH_END,
> +       AXP803_IRQ_BATT_CHG_TEMP_LOW,
> +       AXP803_IRQ_BATT_CHG_TEMP_LOW_END,
> +       AXP803_IRQ_BATT_ACT_TEMP_HIGH,
> +       AXP803_IRQ_BATT_ACT_TEMP_HIGH_END,
> +       AXP803_IRQ_BATT_ACT_TEMP_LOW,
> +       AXP803_IRQ_BATT_ACT_TEMP_LOW_END,
> +       AXP803_IRQ_DIE_TEMP_HIGH,
> +       AXP803_IRQ_GPADC,
> +       AXP803_IRQ_LOW_PWR_LVL1,
> +       AXP803_IRQ_LOW_PWR_LVL2,
> +       AXP803_IRQ_TIMER,
> +       AXP803_IRQ_PEK_RIS_EDGE,
> +       AXP803_IRQ_PEK_FAL_EDGE,
> +       AXP803_IRQ_PEK_SHORT,
> +       AXP803_IRQ_PEK_LONG,
> +       AXP803_IRQ_PEK_OVER_OFF,
> +       AXP803_IRQ_GPIO1_INPUT,
> +       AXP803_IRQ_GPIO0_INPUT,
> +       AXP803_IRQ_BC_USB_CHNG,
> +       AXP803_IRQ_MV_CHNG,
> +};
> +
>  struct axp20x_dev {
>         struct device                   *dev;
>         int                             irq;
> --
> 2.12.2
>
> --
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Re: [linux-sunxi] [PATCH 07/11] regulator: axp20x-regulator: add support for AXP803

[Chen-Yu Tsai]

Hi,

On Wed, Apr 5, 2017 at 2:01 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
> AXP803 PMIC also have a series of regulators (DCDCs and LDOs)
> controllable via I2C/RSB bus.
>
> Add support for them.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  drivers/regulator/axp20x-regulator.c | 135 +++++++++++++++++++++++++++++++----
>  include/linux/mfd/axp20x.h           |  37 ++++++++++
>  2 files changed, 158 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/regulator/axp20x-regulator.c b/drivers/regulator/axp20x-regulator.c
> index 0b9d4e3e52c7..219a731df392 100644
> --- a/drivers/regulator/axp20x-regulator.c
> +++ b/drivers/regulator/axp20x-regulator.c
> @@ -355,6 +355,81 @@ static const struct regulator_desc axp809_regulators[] = {
>         AXP_DESC_SW(AXP809, SW, "sw", "swin", AXP22X_PWR_OUT_CTRL2, BIT(6)),
>  };
>
> +static const struct regulator_linear_range axp803_dcdc234_ranges[] = {
> +       REGULATOR_LINEAR_RANGE(500000, 0x0, 0x46, 10000),
> +       REGULATOR_LINEAR_RANGE(1200000, 0x47, 0x4b, 20000),
> +};

Can you keep the ranges the datasheet uses? It makes it easier to compare.

> +
> +static const struct regulator_linear_range axp803_dcdc5_ranges[] = {
> +       REGULATOR_LINEAR_RANGE(800000, 0x0, 0x20, 10000),
> +       REGULATOR_LINEAR_RANGE(1140000, 0x21, 0x43, 20000),

1.14 ~ 1.84 / 0.02 = 36 steps. This would end at 0x44.

> +};
> +
> +static const struct regulator_linear_range axp803_dcdc6_ranges[] = {
> +       REGULATOR_LINEAR_RANGE(600000, 0x0, 0x32, 10000),
> +       REGULATOR_LINEAR_RANGE(1120000, 0x33, 0x47, 20000),
> +};
> +
> +static const struct regulator_linear_range axp803_dldo2_ranges[] = {
> +       REGULATOR_LINEAR_RANGE(700000, 0x0, 0x1a, 100000),
> +       REGULATOR_LINEAR_RANGE(3400000, 0x1b, 0x1f, 200000),
> +};

This is the same as axp806_cldo2_ranges. To keep the variants sorted
in ascending order, you could keep this version but replace references
to axp806_cldo2_ranges with this one.

> +
> +static const struct regulator_desc axp803_regulators[] = {
> +       AXP_DESC(AXP803, DCDC1, "dcdc1", "vin1", 1600, 3400, 100,
> +                AXP803_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(0)),
> +       AXP_DESC_RANGES(AXP803, DCDC2, "dcdc2", "vin2", axp803_dcdc234_ranges,
> +                       76, AXP803_DCDC2_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
> +                       BIT(1)),
> +       AXP_DESC_RANGES(AXP803, DCDC3, "dcdc3", "vin3", axp803_dcdc234_ranges,
> +                       76, AXP803_DCDC3_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
> +                       BIT(2)),
> +       AXP_DESC_RANGES(AXP803, DCDC4, "dcdc4", "vin4", axp803_dcdc234_ranges,
> +                       76, AXP803_DCDC4_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
> +                       BIT(3)),
> +       AXP_DESC_RANGES(AXP803, DCDC5, "dcdc5", "vin5", axp803_dcdc5_ranges,
> +                       68, AXP803_DCDC5_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
> +                       BIT(4)),
> +       AXP_DESC_RANGES(AXP803, DCDC6, "dcdc6", "vin6", axp803_dcdc6_ranges,
> +                       72, AXP803_DCDC6_V_OUT, 0x7f, AXP22X_PWR_OUT_CTRL1,
> +                       BIT(5)),
> +       /* secondary switchable output of DCDC1 */
> +       AXP_DESC_SW(AXP803, DC1SW, "dc1sw", NULL, AXP22X_PWR_OUT_CTRL2,
> +                   BIT(7)),
> +       AXP_DESC(AXP803, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
> +                AXP22X_ALDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(5)),
> +       AXP_DESC(AXP803, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
> +                AXP22X_ALDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(6)),
> +       AXP_DESC(AXP803, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
> +                AXP22X_ALDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(7)),
> +       AXP_DESC(AXP803, DLDO1, "dldo1", "dldoin", 700, 3300, 100,
> +                AXP22X_DLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(3)),
> +       AXP_DESC_RANGES(AXP803, DLDO2, "dldo2", "dldoin", axp803_dldo2_ranges,
> +                       32, AXP22X_DLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2,
> +                       BIT(4)),
> +       AXP_DESC(AXP803, DLDO3, "dldo3", "dldoin", 700, 3300, 100,
> +                AXP22X_DLDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(5)),
> +       AXP_DESC(AXP803, DLDO4, "dldo4", "dldoin", 700, 3300, 100,
> +                AXP22X_DLDO4_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(6)),

dldo3 and dldo4 are controlled from AXP22X_PWR_OUT_CTRL2.

> +       AXP_DESC(AXP803, ELDO1, "eldo1", "eldoin", 700, 1900, 50,
> +                AXP22X_ELDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(0)),
> +       AXP_DESC(AXP803, ELDO2, "eldo2", "eldoin", 700, 1900, 50,
> +                AXP22X_ELDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(1)),
> +       AXP_DESC(AXP803, ELDO3, "eldo3", "eldoin", 700, 1900, 50,
> +                AXP22X_ELDO3_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(2)),
> +       AXP_DESC(AXP803, FLDO1, "fldo1", "fldoin", 700, 1450, 50,
> +                AXP803_FLDO1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(2)),
> +       AXP_DESC(AXP803, FLDO2, "fldo2", "fldoin", 700, 1450, 50,
> +                AXP803_FLDO2_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL3, BIT(3)),

The fields for fldo* are only four bits wide.

> +       AXP_DESC_IO(AXP803, LDO_IO0, "ldo_io0", "ips", 700, 3300, 100,
> +                   AXP22X_LDO_IO0_V_OUT, 0x1f, AXP20X_GPIO0_CTRL, 0x07,
> +                   AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
> +       AXP_DESC_IO(AXP803, LDO_IO1, "ldo_io1", "ips", 700, 3300, 100,
> +                   AXP22X_LDO_IO1_V_OUT, 0x1f, AXP20X_GPIO1_CTRL, 0x07,
> +                   AXP22X_IO_ENABLED, AXP22X_IO_DISABLED),
> +       AXP_DESC_FIXED(AXP803, RTC_LDO, "rtc_ldo", "ips", 3000),
> +};
> +
>  static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
>  {
>         struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
> @@ -377,6 +452,13 @@ static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
>                  * (See include/linux/mfd/axp20x.h)
>                  */
>                 reg = AXP806_DCDC_FREQ_CTRL;
> +       case AXP803_ID:

AXP803 should come before AXP806.

> +               /*
> +                * AXP803 also have DCDC work frequency setting register at a
> +                * different position.
> +                */
> +               if (axp20x->variant == AXP803_ID)
> +                       reg = AXP803_DCDC_FREQ_CTRL;
>         case AXP221_ID:
>         case AXP223_ID:
>         case AXP809_ID:
> @@ -474,7 +556,13 @@ static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 work
>                 mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP22X_DCDC1);
>                 workmode <<= id - AXP22X_DCDC1;
>                 break;
> +       case AXP803_ID:

Same here. Also this switch block has empty lines separating each case.

> +               if (id < AXP803_DCDC1 || id > AXP803_DCDC6)
> +                       return -EINVAL;
>
> +               mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP803_DCDC1);
> +               workmode <<= id - AXP803_DCDC1;
> +               break;
>         default:
>                 /* should not happen */
>                 WARN_ON(1);
> @@ -492,20 +580,34 @@ static bool axp20x_is_polyphase_slave(struct axp20x_dev *axp20x, int id)
>  {
>         u32 reg = 0;
>
> -       /* Only AXP806 has poly-phase outputs */
> -       if (axp20x->variant != AXP806_ID)
> +       /*
> +        * Currently in our supported AXP variants, only AXP806 and AXP803
> +        * have polyphase regulators.
> +        */
> +       switch (axp20x->variant) {
> +       case AXP806_ID:
> +               regmap_read(axp20x->regmap, AXP806_DCDC_MODE_CTRL2, &reg);
> +
> +               switch (id) {
> +               case AXP806_DCDCB:
> +                       return (((reg & GENMASK(7, 6)) == BIT(6)) ||
> +                               ((reg & GENMASK(7, 6)) == BIT(7)));
> +               case AXP806_DCDCC:
> +                       return ((reg & GENMASK(7, 6)) == BIT(7));
> +               case AXP806_DCDCE:
> +                       return !!(reg & BIT(5));
> +               }
> +       case AXP803_ID:

803 before 806.

> +               regmap_read(axp20x->regmap, AXP803_POLYPHASE_CTRL, &reg);
> +
> +               switch (id) {
> +               case AXP803_DCDC3:
> +                       return !!(reg & BIT(6));
> +               case AXP803_DCDC6:
> +                       return !!(reg & BIT(7));
> +               }
> +       default:
>                 return false;
> -
> -       regmap_read(axp20x->regmap, AXP806_DCDC_MODE_CTRL2, &reg);
> -
> -       switch (id) {
> -       case AXP806_DCDCB:
> -               return (((reg & GENMASK(7, 6)) == BIT(6)) ||
> -                       ((reg & GENMASK(7, 6)) == BIT(7)));
> -       case AXP806_DCDCC:
> -               return ((reg & GENMASK(7, 6)) == BIT(7));
> -       case AXP806_DCDCE:
> -               return !!(reg & BIT(5));
>         }
>
>         return false;
> @@ -548,6 +650,10 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
>                 regulators = axp809_regulators;
>                 nregulators = AXP809_REG_ID_MAX;
>                 break;
> +       case AXP803_ID:
> +               regulators = axp803_regulators;
> +               nregulators = AXP803_REG_ID_MAX;
> +               break;

Ascending order.

>         default:
>                 dev_err(&pdev->dev, "Unsupported AXP variant: %ld\n",
>                         axp20x->variant);
> @@ -579,7 +685,8 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
>                  * name.
>                  */
>                 if ((regulators == axp22x_regulators && i == AXP22X_DC1SW) ||
> -                   (regulators == axp809_regulators && i == AXP809_DC1SW)) {
> +                   (regulators == axp809_regulators && i == AXP809_DC1SW) ||
> +                   (regulators == axp803_regulators && i == AXP803_DC1SW)) {

803 before 809.

So, mostly ordering issues, and a few minor errors.

Regards
ChenYu

>                         new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc),
>                                                 GFP_KERNEL);
>                         *new_desc = regulators[i];
> diff --git a/include/linux/mfd/axp20x.h b/include/linux/mfd/axp20x.h
> index b3220ef374d3..858d5b1b43b9 100644
> --- a/include/linux/mfd/axp20x.h
> +++ b/include/linux/mfd/axp20x.h
> @@ -119,6 +119,17 @@ enum axp20x_variants {
>  #define AXP806_BUS_ADDR_EXT            0xfe
>  #define AXP806_REG_ADDR_EXT            0xff
>
> +#define AXP803_POLYPHASE_CTRL          0x14
> +#define AXP803_FLDO1_V_OUT             0x1c
> +#define AXP803_FLDO2_V_OUT             0x1d
> +#define AXP803_DCDC1_V_OUT             0x20
> +#define AXP803_DCDC2_V_OUT             0x21
> +#define AXP803_DCDC3_V_OUT             0x22
> +#define AXP803_DCDC4_V_OUT             0x23
> +#define AXP803_DCDC5_V_OUT             0x24
> +#define AXP803_DCDC6_V_OUT             0x25
> +#define AXP803_DCDC_FREQ_CTRL          0x3b
> +
>  /* Interrupt */
>  #define AXP152_IRQ1_EN                 0x40
>  #define AXP152_IRQ2_EN                 0x41
> @@ -350,6 +361,32 @@ enum {
>         AXP809_REG_ID_MAX,
>  };
>
> +enum {
> +       AXP803_DCDC1 = 0,
> +       AXP803_DCDC2,
> +       AXP803_DCDC3,
> +       AXP803_DCDC4,
> +       AXP803_DCDC5,
> +       AXP803_DCDC6,
> +       AXP803_DC1SW,
> +       AXP803_ALDO1,
> +       AXP803_ALDO2,
> +       AXP803_ALDO3,
> +       AXP803_DLDO1,
> +       AXP803_DLDO2,
> +       AXP803_DLDO3,
> +       AXP803_DLDO4,
> +       AXP803_ELDO1,
> +       AXP803_ELDO2,
> +       AXP803_ELDO3,
> +       AXP803_FLDO1,
> +       AXP803_FLDO2,
> +       AXP803_RTC_LDO,
> +       AXP803_LDO_IO0,
> +       AXP803_LDO_IO1,
> +       AXP803_REG_ID_MAX,
> +};
> +
>  /* IRQs */
>  enum {
>         AXP152_IRQ_LDO0IN_CONNECT = 1,
> --
> 2.12.2
>
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