From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753456AbdDNPc6 (ORCPT ); Fri, 14 Apr 2017 11:32:58 -0400 Received: from mail-pf0-f194.google.com ([209.85.192.194]:34578 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751371AbdDNPc5 (ORCPT ); Fri, 14 Apr 2017 11:32:57 -0400 Date: Fri, 14 Apr 2017 23:32:43 +0800 From: Dong Aisheng To: Andrey Smirnov Cc: Shawn Guo , yurovsky@gmail.com, Sascha Hauer , Fabio Estevam , Rob Herring , Mark Rutland , Russell King , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 3/8] ARM: dts: imx7s: Adjust anatop-enable-bit for 'reg_1p0d' Message-ID: <20170414153243.GA1792@b29396-OptiPlex-7040> References: <20170413133242.5068-1-andrew.smirnov@gmail.com> <20170413133242.5068-4-andrew.smirnov@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170413133242.5068-4-andrew.smirnov@gmail.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Apr 13, 2017 at 06:32:37AM -0700, Andrey Smirnov wrote: > In PMU_REG_1P0Dn ENABLE_LINREG is bit 0. Bit 31 is called OVERRIDE and > it serves the function of granting permission to GPC IP block to alter > various bit-fields of the register. The reason why this property, that > trickeld here from Freescale BSP, is set to 31 is because in the code > it came from it is used in conjunction with a notifier handler for > REGULATOR_EVENT_PRE_DO_ENABLE and REGULATOR_EVENT_PRE_DO_DISABLE > events (not found in upstream kernel) that triggers GPC to start > manipulating aforementioned other bitfields. > > Since: > a) none of the aforementioned machinery is implemented by > upstream > b) using 'anatop-enable-bit' in that capacity is a bit of a > semantic stretch Yes, this does is a bit of semantic stretch. FSL using is combined with regulator notify and that do bring a bit of complexity. I'm not sure if it's good to introduce another anatop-override-bit to separate, but i'm a bit scare since there's already many.... > > simplify the situation by setting the value of 'anatop-enable-bit' to > point to ENABLE_LINREG (same as i.MX6). > > Cc: yurovsky@gmail.com > Cc: Sascha Hauer > Cc: Fabio Estevam > Cc: Rob Herring > Cc: Mark Rutland > Cc: Russell King > Cc: devicetree@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Cc: linux-arm-kernel@lists.infradead.org > Signed-off-by: Andrey Smirnov > --- > arch/arm/boot/dts/imx7s.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi > index 22c9788..8fee299 100644 > --- a/arch/arm/boot/dts/imx7s.dtsi > +++ b/arch/arm/boot/dts/imx7s.dtsi > @@ -516,7 +516,7 @@ > anatop-min-bit-val = <8>; > anatop-min-voltage = <800000>; > anatop-max-voltage = <1200000>; > - anatop-enable-bit = <31>; > + anatop-enable-bit = <0>; The change of this line seems already exist in patch 1. Regards Dong Aisheng