From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932798AbdDPLDK (ORCPT ); Sun, 16 Apr 2017 07:03:10 -0400 Received: from mail.linuxfoundation.org ([140.211.169.12]:60278 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756666AbdDPLDD (ORCPT ); Sun, 16 Apr 2017 07:03:03 -0400 From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Jani Nikula , Chris Wilson , Joonas Lahtinen , Eric Blau Subject: [PATCH 4.9 24/31] [PATCH] Revert "drm/i915/execlists: Reset RING registers upon resume" Date: Sun, 16 Apr 2017 10:04:15 +0200 Message-Id: <20170416080223.050699211@linuxfoundation.org> X-Mailer: git-send-email 2.12.2 In-Reply-To: <20170416080221.808058771@linuxfoundation.org> References: <20170416080221.808058771@linuxfoundation.org> User-Agent: quilt/0.65 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 4.9-stable review patch. If anyone has any objections, please let me know. ------------------ This reverts commit f2a0409a08502d64fbe3990354dff5902b08d2fb which is commit bafb2f7d4755bf1571bd5e9a03b97f3fc4fe69ae upstream. It was reported to have problems. Cc: Jani Nikula Cc: Chris Wilson Cc: Joonas Lahtinen Cc: Eric Blau Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org --- drivers/gpu/drm/i915/intel_lrc.c | 58 +++++++++++++++------------------------ 1 file changed, 23 insertions(+), 35 deletions(-) --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -2152,42 +2152,30 @@ error_deref_obj: void intel_lr_context_resume(struct drm_i915_private *dev_priv) { + struct i915_gem_context *ctx = dev_priv->kernel_context; struct intel_engine_cs *engine; - struct i915_gem_context *ctx; - /* Because we emit WA_TAIL_DWORDS there may be a disparity - * between our bookkeeping in ce->ring->head and ce->ring->tail and - * that stored in context. As we only write new commands from - * ce->ring->tail onwards, everything before that is junk. If the GPU - * starts reading from its RING_HEAD from the context, it may try to - * execute that junk and die. - * - * So to avoid that we reset the context images upon resume. For - * simplicity, we just zero everything out. - */ - list_for_each_entry(ctx, &dev_priv->context_list, link) { - for_each_engine(engine, dev_priv) { - struct intel_context *ce = &ctx->engine[engine->id]; - u32 *reg; - - if (!ce->state) - continue; - - reg = i915_gem_object_pin_map(ce->state->obj, - I915_MAP_WB); - if (WARN_ON(IS_ERR(reg))) - continue; - - reg += LRC_STATE_PN * PAGE_SIZE / sizeof(*reg); - reg[CTX_RING_HEAD+1] = 0; - reg[CTX_RING_TAIL+1] = 0; - - ce->state->obj->dirty = true; - i915_gem_object_unpin_map(ce->state->obj); - - ce->ring->head = ce->ring->tail = 0; - ce->ring->last_retired_head = -1; - intel_ring_update_space(ce->ring); - } + for_each_engine(engine, dev_priv) { + struct intel_context *ce = &ctx->engine[engine->id]; + void *vaddr; + uint32_t *reg_state; + + if (!ce->state) + continue; + + vaddr = i915_gem_object_pin_map(ce->state->obj, I915_MAP_WB); + if (WARN_ON(IS_ERR(vaddr))) + continue; + + reg_state = vaddr + LRC_STATE_PN * PAGE_SIZE; + + reg_state[CTX_RING_HEAD+1] = 0; + reg_state[CTX_RING_TAIL+1] = 0; + + ce->state->obj->dirty = true; + i915_gem_object_unpin_map(ce->state->obj); + + ce->ring->head = 0; + ce->ring->tail = 0; } }