From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756844AbdDQP5c (ORCPT ); Mon, 17 Apr 2017 11:57:32 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49208 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751295AbdDQP53 (ORCPT ); Mon, 17 Apr 2017 11:57:29 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com A5A703DBC4 Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=jglisse@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com A5A703DBC4 Date: Mon, 17 Apr 2017 11:57:25 -0400 From: Jerome Glisse To: Alan Tull Cc: "Luebbers, Enno" , Moritz Fischer , Wu Hao , linux-fpga@vger.kernel.org, Linux Kernel Mailing List , "Kang, Luwei" , "Zhang, Yi Z" Subject: Re: [PATCH 00/16] Intel FPGA Device Drivers Message-ID: <20170417155723.GA4547@redhat.com> References: <1490875696-15145-1-git-send-email-hao.wu@intel.com> <20170406202700.GA3674@redhat.com> <20170411193806.GA33858@eluebber-mac02.jf.intel.com> <20170412132919.GA16072@redhat.com> <20170412153746.GA17158@redhat.com> <20170414194817.GA27424@eluebber-mac02.jf.intel.com> <20170414204955.GA4805@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: Mutt/1.7.1 (2016-10-04) X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Mon, 17 Apr 2017 15:57:29 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Apr 17, 2017 at 10:35:01AM -0500, Alan Tull wrote: > On Fri, Apr 14, 2017 at 3:49 PM, Jerome Glisse wrote: > > Hi Jerome, > > > On Fri, Apr 14, 2017 at 12:48:17PM -0700, Luebbers, Enno wrote: > >> On Wed, Apr 12, 2017 at 11:37:49AM -0400, Jerome Glisse wrote: > >> > On Wed, Apr 12, 2017 at 07:46:19AM -0700, Moritz Fischer wrote: > >> > > On Wed, Apr 12, 2017 at 6:29 AM, Jerome Glisse wrote: > >> > > > >> > > > It is like if on GPU we only had close source compiler for the GPU > >> > > > instructions set. So FPGA is definitly following different rules than > >> > > > open source upstream GPU kernel driver abides to. > > Sorry, not a GPU guy, can you point me to something that documents > this policy of 'only opensource compilers for GPU'? I looked under > linux/Documentation and didn't see anything. https://lists.freedesktop.org/archives/dri-devel/2010-July/001828.html There is no explicit mention about compiler but trust me it is included in everyones mind. You can ask Dave i am sure he would reject a driver with everything open except the shader compiler. > The current patchset doesn't have anything to do with FPGA toolchains > but you're using this patchset as a platform to talk about toolchain > issues. Well Intel inclusion of FPGA triggered my curiosity and when that patchset came accross my inbox i did wonder where the open source userspace was and went looking for it to no avail. So this isn't against a specific patchset but more broadly against the whole drivers/fpga/ story. Sorry if this was not clear. > It sounds like you are opposed to any kernel support of loading images > on FPGAs until all vendors have opensource toolchains. Yes that is what i am saying. They are different standard in the kernel and i would rather have one clear standard about driver needing proper open source userspace to go along with any upstream driver. Beside when it comes to FPGA i am still puzzle on why no one release info on the bitstream. They all provide details documentation on the internal (LUT, flip-flop, logic block layout and connection, memory block, ...). So there is nothing hidden in the bitstream. I am guessing the only good reason i can think of is to make it harder to map a bitstream back to VHDL/Verilog/... Cheers, Jérôme