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From: Zi Yan <zi.yan@sent.com>
To: n-horiguchi@ah.jp.nec.com, kirill.shutemov@linux.intel.com,
	linux-kernel@vger.kernel.org, linux-mm@kvack.org
Cc: akpm@linux-foundation.org, minchan@kernel.org, vbabka@suse.cz,
	mgorman@techsingularity.net, mhocko@kernel.org,
	khandual@linux.vnet.ibm.com, zi.yan@cs.rutgers.edu,
	dnellans@nvidia.com
Subject: [PATCH v5 01/11] mm: x86: move _PAGE_SWP_SOFT_DIRTY from bit 7 to bit 1
Date: Thu, 20 Apr 2017 16:47:42 -0400	[thread overview]
Message-ID: <20170420204752.79703-2-zi.yan@sent.com> (raw)
In-Reply-To: <20170420204752.79703-1-zi.yan@sent.com>

From: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>

pmd_present() checks _PAGE_PSE along with _PAGE_PRESENT to avoid
false negative return when it races with thp spilt
(during which _PAGE_PRESENT is temporary cleared.) I don't think that
dropping _PAGE_PSE check in pmd_present() works well because it can
hurt optimization of tlb handling in thp split.
In the current kernel, bits 1-4 are not used in non-present format
since commit 00839ee3b299 ("x86/mm: Move swap offset/type up in PTE to
work around erratum"). So let's move _PAGE_SWP_SOFT_DIRTY to bit 1.
Bit 7 is used as reserved (always clear), so please don't use it for
other purpose.

Signed-off-by: Naoya Horiguchi <n-horiguchi@ah.jp.nec.com>
Signed-off-by: Zi Yan <zi.yan@cs.rutgers.edu>
---
 arch/x86/include/asm/pgtable_64.h    | 12 +++++++++---
 arch/x86/include/asm/pgtable_types.h | 10 +++++-----
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index 73c7ccc38912..770b5ae271ed 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -157,15 +157,21 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
 /*
  * Encode and de-code a swap entry
  *
- * |     ...            | 11| 10|  9|8|7|6|5| 4| 3|2|1|0| <- bit number
- * |     ...            |SW3|SW2|SW1|G|L|D|A|CD|WT|U|W|P| <- bit names
- * | OFFSET (14->63) | TYPE (9-13)  |0|X|X|X| X| X|X|X|0| <- swp entry
+ * |     ...            | 11| 10|  9|8|7|6|5| 4| 3|2| 1|0| <- bit number
+ * |     ...            |SW3|SW2|SW1|G|L|D|A|CD|WT|U| W|P| <- bit names
+ * | OFFSET (14->63) | TYPE (9-13)  |0|0|X|X| X| X|X|SD|0| <- swp entry
  *
  * G (8) is aliased and used as a PROT_NONE indicator for
  * !present ptes.  We need to start storing swap entries above
  * there.  We also need to avoid using A and D because of an
  * erratum where they can be incorrectly set by hardware on
  * non-present PTEs.
+ *
+ * SD (1) in swp entry is used to store soft dirty bit, which helps us
+ * remember soft dirty over page migration
+ *
+ * Bit 7 in swp entry should be 0 because pmd_present checks not only P,
+ * but also L and G.
  */
 #define SWP_TYPE_FIRST_BIT (_PAGE_BIT_PROTNONE + 1)
 #define SWP_TYPE_BITS 5
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
index df08535f774a..9a4ac934659e 100644
--- a/arch/x86/include/asm/pgtable_types.h
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -97,15 +97,15 @@
 /*
  * Tracking soft dirty bit when a page goes to a swap is tricky.
  * We need a bit which can be stored in pte _and_ not conflict
- * with swap entry format. On x86 bits 6 and 7 are *not* involved
- * into swap entry computation, but bit 6 is used for nonlinear
- * file mapping, so we borrow bit 7 for soft dirty tracking.
+ * with swap entry format. On x86 bits 1-4 are *not* involved
+ * into swap entry computation, but bit 7 is used for thp migration,
+ * so we borrow bit 1 for soft dirty tracking.
  *
  * Please note that this bit must be treated as swap dirty page
- * mark if and only if the PTE has present bit clear!
+ * mark if and only if the PTE/PMD has present bit clear!
  */
 #ifdef CONFIG_MEM_SOFT_DIRTY
-#define _PAGE_SWP_SOFT_DIRTY	_PAGE_PSE
+#define _PAGE_SWP_SOFT_DIRTY	_PAGE_RW
 #else
 #define _PAGE_SWP_SOFT_DIRTY	(_AT(pteval_t, 0))
 #endif
-- 
2.11.0

  reply	other threads:[~2017-04-20 21:01 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-20 20:47 [PATCH v5 00/11] mm: page migration enhancement for thp Zi Yan
2017-04-20 20:47 ` Zi Yan [this message]
2017-05-19 13:07   ` [PATCH v5 01/11] mm: x86: move _PAGE_SWP_SOFT_DIRTY from bit 7 to bit 1 Anshuman Khandual
2017-05-19 15:55   ` Dave Hansen
2017-05-19 16:31     ` Zi Yan
2017-05-19 16:36       ` Dave Hansen
2017-04-20 20:47 ` [PATCH v5 02/11] mm: mempolicy: add queue_pages_node_check() Zi Yan
2017-04-21  4:04   ` Anshuman Khandual
2017-05-19 13:13     ` Anshuman Khandual
2017-05-19 16:02       ` Mel Gorman
2017-05-19 16:37         ` Zi Yan
2017-05-19 20:28           ` Mel Gorman
2017-05-19 20:48             ` Zi Yan
2017-05-19 21:39               ` Mel Gorman
2017-04-20 20:47 ` [PATCH v5 03/11] mm: thp: introduce separate TTU flag for thp freezing Zi Yan
2017-04-21  4:29   ` Anshuman Khandual
2017-04-20 20:47 ` [PATCH v5 04/11] mm: thp: introduce CONFIG_ARCH_ENABLE_THP_MIGRATION Zi Yan
2017-04-21  4:36   ` Anshuman Khandual
2017-04-20 20:47 ` [PATCH v5 05/11] mm: thp: enable thp migration in generic path Zi Yan
2017-04-20 20:47 ` [PATCH v5 06/11] mm: thp: check pmd migration entry in common path Zi Yan
2017-04-21  6:17   ` Anshuman Khandual
2017-04-21 15:17     ` Zi Yan
2017-04-20 20:47 ` [PATCH v5 07/11] mm: soft-dirty: keep soft-dirty bits over thp migration Zi Yan
2017-04-20 20:47 ` [PATCH v5 08/11] mm: hwpoison: soft offline supports " Zi Yan
2017-04-21  8:10   ` Anshuman Khandual
2017-04-21 15:55     ` Zi Yan
2017-04-27  4:41       ` Naoya Horiguchi
2017-04-27 16:39         ` Zi Yan
2017-04-20 20:47 ` [PATCH v5 09/11] mm: mempolicy: mbind and migrate_pages support " Zi Yan
2017-04-21  8:22   ` Anshuman Khandual
2017-04-21 16:00     ` Zi Yan
2017-04-20 20:47 ` [PATCH v5 10/11] mm: migrate: move_pages() supports " Zi Yan
2017-04-20 20:47 ` [PATCH v5 11/11] mm: memory_hotplug: memory hotremove " Zi Yan
2017-05-19 13:56   ` Anshuman Khandual

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