From: David Miller <davem@davemloft.net>
To: glaubitz@physik.fu-berlin.de
Cc: kirill@shutemov.name, kirill.shutemov@linux.intel.com,
linux-kernel@vger.kernel.org, ak@linux.intel.com,
dave.hansen@intel.com, luto@amacapital.net, mhocko@suse.com,
linux-arch@vger.kernel.org, linux-mm@kvack.org
Subject: Re: Question on the five-level page table support patches
Date: Mon, 24 Apr 2017 18:09:48 -0400 (EDT) [thread overview]
Message-ID: <20170424.180948.1311847745777709716.davem@davemloft.net> (raw)
In-Reply-To: <fdc80e3c-6909-cf39-fe0b-6f1c012571e4@physik.fu-berlin.de>
From: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Date: Mon, 24 Apr 2017 22:37:40 +0200
> Would be really nice to able to have a canonical solution for this issue,
> it's been biting us on SPARC for quite a while now due to the fact that
> virtual address space has been 52 bits on SPARC for a while now.
It's going to break again with things like ADI which encode protection
keys in the high bits of the 64-bit virtual address.
Reallly, it would be nice if these tags were instead encoded in the
low bits of suitably aligned memory allocations but I am sure it's to
late to do that now.
next prev parent reply other threads:[~2017-04-24 22:10 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-23 10:53 Question on the five-level page table support patches John Paul Adrian Glaubitz
2017-04-24 5:11 ` Andy Lutomirski
2017-04-24 13:03 ` Andi Kleen
2017-04-24 20:33 ` John Paul Adrian Glaubitz
2017-04-24 16:19 ` Kirill A. Shutemov
2017-04-24 20:37 ` John Paul Adrian Glaubitz
2017-04-24 22:01 ` Kirill A. Shutemov
2017-04-24 22:09 ` David Miller [this message]
2017-04-25 7:25 ` Jon Masters
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