From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S976039AbdDXReX (ORCPT ); Mon, 24 Apr 2017 13:34:23 -0400 Received: from foss.arm.com ([217.140.101.70]:59770 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S972133AbdDXReP (ORCPT ); Mon, 24 Apr 2017 13:34:15 -0400 Date: Mon, 24 Apr 2017 18:34:14 +0100 From: Will Deacon To: Ard Biesheuvel Cc: Matthias Kaehlcke , Catalin Marinas , Christoffer Dall , Marc Zyngier , Paolo Bonzini , Radim =?utf-8?B?S3LEjW3DocWZ?= , Tejun Heo , Christoph Lameter , Vladimir Murzin , Mark Rutland , "linux-arm-kernel@lists.infradead.org" , "kvmarm@lists.cs.columbia.edu" , KVM devel mailing list , "linux-kernel@vger.kernel.org" , Grant Grundler , Greg Hackmann , Michael Davidson Subject: Re: [PATCH] arm64: Add ASM modifier for xN register operands Message-ID: <20170424173413.GW12323@arm.com> References: <20170420183053.718-1-mka@chromium.org> <20170424170009.GT12323@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Apr 24, 2017 at 06:22:51PM +0100, Ard Biesheuvel wrote: > On 24 April 2017 at 18:00, Will Deacon wrote: > > Hi Matthias, > > > > On Thu, Apr 20, 2017 at 11:30:53AM -0700, Matthias Kaehlcke wrote: > >> Many inline assembly statements don't include the 'x' modifier when > >> using xN registers as operands. This is perfectly valid, however it > >> causes clang to raise warnings like this: > >> > >> warning: value size does not match register size specified by the > >> constraint and modifier [-Wasm-operand-widths] > >> ... > >> arch/arm64/include/asm/barrier.h:62:23: note: expanded from macro > >> '__smp_store_release' > >> asm volatile ("stlr %1, %0" > > > > If I understand this correctly, then the warning is emitted when we pass > > in a value smaller than 64-bit, but refer to % without a modifier > > in the inline asm. > > > > However, if that's the case then I don't understand why: > > > >> diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h > >> index 0c00c87bb9dd..021e1733da0c 100644 > >> --- a/arch/arm64/include/asm/io.h > >> +++ b/arch/arm64/include/asm/io.h > >> @@ -39,33 +39,33 @@ > >> #define __raw_writeb __raw_writeb > >> static inline void __raw_writeb(u8 val, volatile void __iomem *addr) > >> { > >> - asm volatile("strb %w0, [%1]" : : "rZ" (val), "r" (addr)); > >> + asm volatile("strb %w0, [%x1]" : : "rZ" (val), "r" (addr)); > > > > is necessary. addr is a pointer type, so is 64-bit. > > > > Given that the scattergun nature of this patch implies that you've been > > fixing the places where warnings are reported, then I'm confused as to > > why a warning is generated for the case above. > > > > What am I missing? > > > > AIUI, Clang now always complains for missing register width modifiers, > not just for placeholders that resolve to a 32-bit (or smaller) > quantity. Ok, in which case this patch is incomplete as there's a bunch of asm that isn't updated (e.g. spinlock.h). Will