[PATCH] drm: mali-dp: use div_u64 for expensive 64-bit divisions

From: Arnd Bergmann <arnd@arndb.de>
To: Liviu Dudau <liviu.dudau@arm.com>,
	Brian Starkey <brian.starkey@arm.com>,
	Mali DP Maintainers <malidp@foss.arm.com>,
	David Airlie <airlied@linux.ie>
Cc: Arnd Bergmann <arnd@arndb.de>,
	Mihail Atanassov <mihail.atanassov@arm.com>,
	Daniel Vetter <daniel.vetter@ffwll.ch>,
	Shawn Guo <shawn.guo@linaro.org>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: [PATCH] drm: mali-dp: use div_u64 for expensive 64-bit divisions
Date: Tue, 25 Apr 2017 21:56:53 +0200	[thread overview]
Message-ID: <20170425195712.2017230-1-arnd@arndb.de> (raw)

On 32-bit machines, we can't divide 64-bit integers:

drivers/gpu/drm/arm/malidp_crtc.o: In function `malidp_crtc_atomic_check':
malidp_crtc.c:(.text.malidp_crtc_atomic_check+0x3c0): undefined reference to `__aeabi_uldivmod'
malidp_crtc.c:(.text.malidp_crtc_atomic_check+0x3dc): undefined reference to `__aeabi_uldivmod'

This calls the div_u64 function explicitly instead.

Fixes: 4cea4e9f6690 ("drm: mali-dp: Add plane upscaling support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 drivers/gpu/drm/arm/malidp_crtc.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/arm/malidp_crtc.c b/drivers/gpu/drm/arm/malidp_crtc.c
index 19f1f3b34691..9446a673d469 100644
--- a/drivers/gpu/drm/arm/malidp_crtc.c
+++ b/drivers/gpu/drm/arm/malidp_crtc.c
@@ -266,7 +266,6 @@ static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc,
 
 	drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) {
 		struct malidp_plane *mp = to_malidp_plane(plane);
-		u64 crtc_w, crtc_h;
 		u32 phase;
 
 		if (!(mp->layer->id & scaling))
@@ -276,10 +275,10 @@ static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc,
 		 * Convert crtc_[w|h] to U32.32, then divide by U16.16 src_[w|h]
 		 * to get the U16.16 result.
 		 */
-		crtc_w = (u64)pstate->crtc_w << 32;
-		crtc_h = (u64)pstate->crtc_h << 32;
-		h_upscale_factor = (u32)(crtc_w / pstate->src_w);
-		v_upscale_factor = (u32)(crtc_h / pstate->src_h);
+		h_upscale_factor = div_u64((u64)pstate->crtc_w << 32,
+					   pstate->src_w);
+		v_upscale_factor = div_u64((u64)pstate->crtc_h << 32,
+					   pstate->src_h);
 
 		s->enhancer_enable = ((h_upscale_factor >> 16) >= 2 ||
 				      (v_upscale_factor >> 16) >= 2);
-- 
2.9.0
