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From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Cc: Chen-Yu Tsai <wens@csie.org>,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: [PATCH v2 2/8] clk: Provide option to query hardware for clk phase
Date: Wed,  3 May 2017 11:09:23 +0800	[thread overview]
Message-ID: <20170503030929.28763-3-wens@csie.org> (raw)
In-Reply-To: <20170503030929.28763-1-wens@csie.org>

On some hardware, the clk phase is tied to the parent clk's
rate and some clk delay programmed into the hardware. As the
parent clk rate changes, so does the clk phase.

Add a clk flag specifying not to use the cached clk phase,
but always query the hardware for it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/clk/clk.c            | 6 +++++-
 include/linux/clk-provider.h | 1 +
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 67201f67a14a..05e2481c1340 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1929,7 +1929,11 @@ static int clk_core_get_phase(struct clk_core *core)
 	int ret;
 
 	clk_prepare_lock();
-	ret = core->phase;
+	if (core && (core->flags & CLK_GET_PHASE_NOCACHE) &&
+	    core->ops->get_phase)
+		ret = core->ops->get_phase(core->hw);
+	else
+		ret = core->phase;
 	clk_prepare_unlock();
 
 	return ret;
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index a428aec36ace..e2e856b1a81f 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -35,6 +35,7 @@
 #define CLK_IS_CRITICAL		BIT(11) /* do not gate, ever */
 /* parents need enable during gate/ungate, set rate and re-parent */
 #define CLK_OPS_PARENT_ENABLE	BIT(12)
+#define CLK_GET_PHASE_NOCACHE	BIT(13) /* do not use the cached clk phase */
 
 struct clk;
 struct clk_hw;
-- 
2.11.0

  parent reply	other threads:[~2017-05-03  3:09 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-03  3:09 [PATCH v2 0/8] clk: sunxi-ng: Add support for A83T CCU Chen-Yu Tsai
2017-05-03  3:09 ` [PATCH v2 1/8] dt-bindings: clock: sunxi-ccu: Add compatible string " Chen-Yu Tsai
2017-05-03  3:09 ` Chen-Yu Tsai [this message]
2017-05-03  3:09 ` [PATCH v2 3/8] clk: sunxi-ng: Add class of phase clocks supporting MMC new timing modes Chen-Yu Tsai
2017-05-03  3:09 ` [PATCH v2 4/8] clk: sunxi-ng: Support multiple variable pre-dividers Chen-Yu Tsai
2017-05-03  3:09 ` [PATCH v2 5/8] clk: sunxi-ng: Add driver for A83T CCU Chen-Yu Tsai
2017-05-03  3:09 ` [PATCH v2 6/8] ARM: sun8i: a83t: Add CCU device nodes Chen-Yu Tsai
2017-05-03  3:09 ` [PATCH v2 7/8] ARM: sun8i: a83t: Set clock accuracy for 24MHz oscillator Chen-Yu Tsai
2017-05-03  3:09 ` [PATCH v2 8/8] ARM: sun8i: a83t: Switch to CCU device tree binding macros Chen-Yu Tsai
2017-05-03  3:16 [PATCH v2 0/8] clk: sunxi-ng: Add support for A83T CCU Chen-Yu Tsai
2017-05-03  3:16 ` [PATCH v2 2/8] clk: Provide option to query hardware for clk phase Chen-Yu Tsai

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