From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932532AbdEDLvd (ORCPT ); Thu, 4 May 2017 07:51:33 -0400 Received: from hermes.aosc.io ([199.195.250.187]:39306 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753214AbdEDLvU (ORCPT ); Thu, 4 May 2017 07:51:20 -0400 From: Icenowy Zheng To: Maxime Ripard , Rob Herring , Chen-Yu Tsai Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [PATCH v6 12/13] ARM: dts: sun8i: add pinmux for LCD pins of V3s SoC Date: Thu, 4 May 2017 19:48:57 +0800 Message-Id: <20170504114858.9008-13-icenowy@aosc.io> In-Reply-To: <20170504114858.9008-1-icenowy@aosc.io> References: <20170504114858.9008-1-icenowy@aosc.io> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Allwinner V3s SoC features a set of pins that have functionality of RGB LCD, the pins are at different pin ban than other SoCs. Add pinctrl node for them. Signed-off-by: Icenowy Zheng --- arch/arm/boot/dts/sun8i-v3s.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 0a895179d8ae..a37d68b227bc 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -297,6 +297,15 @@ function = "i2c0"; }; + lcd_rgb666_pins: lcd_rgb666@0 { + pins = "PE0", "PE1", "PE2", "PE3", "PE4", + "PE5", "PE6", "PE7", "PE8", "PE9", + "PE10", "PE11", "PE12", "PE13", "PE14", + "PE15", "PE16", "PE17", "PE18", "PE19", + "PE23", "PE24"; + function = "lcd"; + }; + uart0_pins_a: uart0@0 { pins = "PB8", "PB9"; function = "uart0"; -- 2.12.2