From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>
Cc: Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Dan Williams <dan.j.williams@intel.com>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Subject: [PATCHv5, REBASED 0/9] x86: 5-level paging enabling for v4.12, Part 4
Date: Mon, 15 May 2017 15:12:09 +0300 [thread overview]
Message-ID: <20170515121218.27610-1-kirill.shutemov@linux.intel.com> (raw)
Here's rebased version the fourth and the last bunch of of patches that brings
initial 5-level paging enabling.
Please review and consider applying.
Kirill A. Shutemov (9):
x86/asm: Fix comment in return_from_SYSCALL_64
x86/boot/64: Rewrite startup_64 in C
x86/boot/64: Rename init_level4_pgt and early_level4_pgt
x86/boot/64: Add support of additional page table level during early
boot
x86/mm: Add sync_global_pgds() for configuration with 5-level paging
x86/mm: Make kernel_physical_mapping_init() support 5-level paging
x86/mm: Add support for 5-level paging for KASLR
x86: Enable 5-level paging support
x86/mm: Allow to have userspace mappings above 47-bits
arch/x86/Kconfig | 5 +
arch/x86/boot/compressed/head_64.S | 23 ++++-
arch/x86/entry/entry_64.S | 3 +-
arch/x86/include/asm/elf.h | 4 +-
arch/x86/include/asm/mpx.h | 9 ++
arch/x86/include/asm/pgtable.h | 2 +-
arch/x86/include/asm/pgtable_64.h | 6 +-
arch/x86/include/asm/processor.h | 11 ++-
arch/x86/include/uapi/asm/processor-flags.h | 2 +
arch/x86/kernel/espfix_64.c | 2 +-
arch/x86/kernel/head64.c | 143 +++++++++++++++++++++++++---
arch/x86/kernel/head_64.S | 134 ++++++--------------------
arch/x86/kernel/machine_kexec_64.c | 2 +-
arch/x86/kernel/sys_x86_64.c | 30 +++++-
arch/x86/mm/dump_pagetables.c | 2 +-
arch/x86/mm/hugetlbpage.c | 27 +++++-
arch/x86/mm/init_64.c | 108 +++++++++++++++++++--
arch/x86/mm/kasan_init_64.c | 12 +--
arch/x86/mm/kaslr.c | 81 ++++++++++++----
arch/x86/mm/mmap.c | 6 +-
arch/x86/mm/mpx.c | 33 ++++++-
arch/x86/realmode/init.c | 2 +-
arch/x86/xen/Kconfig | 1 +
arch/x86/xen/mmu_pv.c | 18 ++--
arch/x86/xen/xen-pvh.S | 2 +-
25 files changed, 480 insertions(+), 188 deletions(-)
--
2.11.0
next reply other threads:[~2017-05-15 12:13 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-15 12:12 Kirill A. Shutemov [this message]
2017-05-15 12:12 ` [PATCHv5, REBASED 1/9] x86/asm: Fix comment in return_from_SYSCALL_64 Kirill A. Shutemov
2017-05-15 12:12 ` [PATCHv5, REBASED 2/9] x86/boot/64: Rewrite startup_64 in C Kirill A. Shutemov
2017-05-15 12:12 ` [PATCHv5, REBASED 3/9] x86/boot/64: Rename init_level4_pgt and early_level4_pgt Kirill A. Shutemov
2017-05-15 12:12 ` [PATCHv5, REBASED 4/9] x86/boot/64: Add support of additional page table level during early boot Kirill A. Shutemov
2017-05-15 12:12 ` [PATCHv5, REBASED 5/9] x86/mm: Add sync_global_pgds() for configuration with 5-level paging Kirill A. Shutemov
2017-05-15 12:12 ` [PATCHv5, REBASED 6/9] x86/mm: Make kernel_physical_mapping_init() support " Kirill A. Shutemov
2017-05-15 12:12 ` [PATCHv5, REBASED 7/9] x86/mm: Add support for 5-level paging for KASLR Kirill A. Shutemov
2017-05-15 12:12 ` [PATCHv5, REBASED 8/9] x86: Enable 5-level paging support Kirill A. Shutemov
2017-05-15 12:31 ` Juergen Gross
2017-05-15 14:11 ` Kirill A. Shutemov
2017-05-15 14:13 ` Juergen Gross
2017-05-15 12:12 ` [PATCHv5, REBASED 9/9] x86/mm: Allow to have userspace mappings above 47-bits Kirill A. Shutemov
2017-05-15 14:49 ` kbuild test robot
2017-05-15 19:48 ` Kirill A. Shutemov
2017-05-18 11:43 ` Michal Hocko
2017-05-18 15:19 ` Kirill A. Shutemov
2017-05-18 15:27 ` Michal Hocko
2017-05-18 15:41 ` Kirill A. Shutemov
2017-05-18 15:50 ` Michal Hocko
2017-05-18 15:59 ` Michal Hocko
2017-05-18 16:22 ` Kirill A. Shutemov
2017-05-18 17:13 ` Michal Hocko
2017-05-18 17:51 ` Michal Hocko
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