From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751519AbdEaHZA (ORCPT ); Wed, 31 May 2017 03:25:00 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:33237 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751323AbdEaHWP (ORCPT ); Wed, 31 May 2017 03:22:15 -0400 From: Corentin Labbe To: robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, Corentin Labbe Subject: [PATCH v6 16/21] arm64: allwinner: pine64: Enable dwmac-sun8i Date: Wed, 31 May 2017 09:18:47 +0200 Message-Id: <20170531071852.12422-17-clabbe.montjoie@gmail.com> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170531071852.12422-1-clabbe.montjoie@gmail.com> References: <20170531071852.12422-1-clabbe.montjoie@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The dwmac-sun8i hardware is present on the pine64 It uses an external PHY via RMII. Signed-off-by: Corentin Labbe --- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts index 7c533b6d4ba9..08cda24ea194 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts @@ -78,6 +78,15 @@ status = "okay"; }; +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&rmii_pins>; + phy-mode = "rmii"; + phy-handle = <&ext_rmii_phy1>; + status = "okay"; + +}; + &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; @@ -88,6 +97,13 @@ bias-pull-up; }; +&mdio { + ext_rmii_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; -- 2.13.0