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From: Alan Tull <atull@kernel.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-kernel@vger.kernel.org, linux-fpga@vger.kernel.org,
	Moritz Fischer <moritz.fischer@ettus.com>,
	delicious.quinoa@gmail.com,
	Joshua Clayton <stillcompiling@gmail.com>,
	Alan Tull <atull@kernel.org>
Subject: [PATCH 05/10] doc: dt: document altera-passive-serial binding
Date: Mon,  5 Jun 2017 14:07:36 -0500
Message-ID: <20170605190741.10508-6-atull@kernel.org> (raw)
In-Reply-To: <20170605190741.10508-1-atull@kernel.org>

From: Joshua Clayton <stillcompiling@gmail.com>

Describe an altera-passive-serial devicetree entry, required features

Signed-off-by: Joshua Clayton <stillcompiling@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alan Tull <atull@kernel.org>
---
 .../bindings/fpga/altera-passive-serial.txt        | 29 ++++++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/fpga/altera-passive-serial.txt

diff --git a/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt
new file mode 100644
index 000000000000..48478bc07e29
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-passive-serial.txt
@@ -0,0 +1,29 @@
+Altera Passive Serial SPI FPGA Manager
+
+Altera FPGAs support a method of loading the bitstream over what is
+referred to as "passive serial".
+The passive serial link is not technically SPI, and might require extra
+circuits in order to play nicely with other SPI slaves on the same bus.
+
+See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf
+
+Required properties:
+- compatible: Must be one of the following:
+	"altr,fpga-passive-serial",
+	"altr,fpga-arria10-passive-serial"
+- reg: SPI chip select of the FPGA
+- nconfig-gpios: config pin (referred to as nCONFIG in the manual)
+- nstat-gpios: status pin (referred to as nSTATUS in the manual)
+
+Optional properties:
+- confd-gpios: confd pin (referred to as CONF_DONE in the manual)
+
+Example:
+	fpga: fpga@0 {
+		compatible = "altr,fpga-passive-serial";
+		spi-max-frequency = <20000000>;
+		reg = <0>;
+		nconfig-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
+		nstat-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
+		confd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
+	};
-- 
2.11.0

  parent reply index

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-05 19:07 [PATCH 00/10] patches for fpga Alan Tull
2017-06-05 19:07 ` [PATCH 01/10] dt-bindings: fpga: Add bindings document for Xilinx LogiCore PR Decoupler Alan Tull
2017-06-05 19:07 ` [PATCH 02/10] Make FPGA a menuconfig to ease disabling it all Alan Tull
2017-06-05 19:07 ` [PATCH 03/10] fpga: allow to compile-test Altera FPGA bridge drivers Alan Tull
2017-06-06 13:45   ` kbuild test robot
2017-06-09  9:49   ` Greg Kroah-Hartman
2017-06-09 13:44     ` Tobias Klauser
2017-06-10  3:55       ` Alan Tull
2017-06-05 19:07 ` [PATCH 04/10] fpga: Add flag to indicate SPI bitstream is bit-reversed Alan Tull
2017-06-05 19:07 ` Alan Tull [this message]
2017-06-05 19:07 ` [PATCH 06/10] fpga manager: Add altera-ps-spi driver for Altera FPGAs Alan Tull
2017-06-09  9:51   ` Greg Kroah-Hartman
2017-06-09 13:18     ` Anatolij Gustschin
2017-06-09 22:07       ` stillcompiling
2017-06-10 14:43     ` Alan Tull
2017-06-05 19:07 ` [PATCH 07/10] ARM: dts: imx6q-evi: support altera-ps-spi Alan Tull
2017-06-05 19:07 ` [PATCH 08/10] lib: add bitrev8x4() Alan Tull
2017-06-05 19:07 ` [PATCH 09/10] fpga-manager: altera-ps-spi: use bitrev8x4 Alan Tull
2017-06-05 19:07 ` [PATCH 10/10] of: Add vendor prefix for Lattice Semiconductor Alan Tull

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