From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751630AbdFGNQN (ORCPT ); Wed, 7 Jun 2017 09:16:13 -0400 Received: from mx2.suse.de ([195.135.220.15]:46115 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751602AbdFGNQJ (ORCPT ); Wed, 7 Jun 2017 09:16:09 -0400 Date: Wed, 7 Jun 2017 15:15:50 +0200 From: Borislav Petkov To: Ricardo Neri Cc: Ingo Molnar , Thomas Gleixner , "H. Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Andrew Morton , Brian Gerst , Chris Metcalf , Dave Hansen , Paolo Bonzini , Masami Hiramatsu , Huang Rui , Jiri Slaby , Jonathan Corbet , "Michael S. Tsirkin" , Paul Gortmaker , Vlastimil Babka , Chen Yucong , Alexandre Julliard , Stas Sergeev , Fenghua Yu , "Ravi V. Shankar" , Shuah Khan , linux-kernel@vger.kernel.org, x86@kernel.org, linux-msdos@vger.kernel.org, wine-devel@winehq.org, Adam Buchbinder , Colin Ian King , Lorenzo Stoakes , Qiaowei Ren , Arnaldo Carvalho de Melo , Adrian Hunter , Kees Cook , Thomas Garnier , Dmitry Vyukov Subject: Re: [PATCH v7 14/26] x86/insn-eval: Indicate a 32-bit displacement if ModRM.mod is 0 and ModRM.rm is 5 Message-ID: <20170607131550.y6zpkaggfsbinjo2@pd.tnic> References: <20170505181724.55000-1-ricardo.neri-calderon@linux.intel.com> <20170505181724.55000-15-ricardo.neri-calderon@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20170505181724.55000-15-ricardo.neri-calderon@linux.intel.com> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 05, 2017 at 11:17:12AM -0700, Ricardo Neri wrote: > Section 2.2.1.3 of the Intel 64 and IA-32 Architectures Software > Developer's Manual volume 2A states that when ModRM.mod is zero and > ModRM.rm is 101b, a 32-bit displacement follows the ModRM byte. This means > that none of the registers are used in the computation of the effective > address. A return value of -EDOM signals callers that they should not use > the value of registers when computing the effective address for the > instruction. > > In IA-32e 64-bit mode (long mode), the effective address is given by the > 32-bit displacement plus the value of RIP of the next instruction. > In IA-32e compatibility mode (protected mode), only the displacement is > used. > > The instruction decoder takes care of obtaining the displacement. ... > diff --git a/arch/x86/lib/insn-eval.c b/arch/x86/lib/insn-eval.c > index 693e5a8..4f600de 100644 > --- a/arch/x86/lib/insn-eval.c > +++ b/arch/x86/lib/insn-eval.c > @@ -379,6 +379,12 @@ static int get_reg_offset(struct insn *insn, struct pt_regs *regs, > switch (type) { > case REG_TYPE_RM: > regno = X86_MODRM_RM(insn->modrm.value); <---- newline here. > + /* > + * ModRM.mod == 0 and ModRM.rm == 5 means a 32-bit displacement > + * follows the ModRM byte. > + */ > + if (!X86_MODRM_MOD(insn->modrm.value) && regno == 5) > + return -EDOM; > if (X86_REX_B(insn->rex_prefix.value)) > regno += 8; > break; > @@ -730,9 +736,21 @@ void __user *insn_get_addr_ref(struct insn *insn, struct pt_regs *regs) > eff_addr = base + indx * (1 << X86_SIB_SCALE(sib)); > } else { > addr_offset = get_reg_offset(insn, regs, REG_TYPE_RM); > - if (addr_offset < 0) ditto. > + /* > + * -EDOM means that we must ignore the address_offset. > + * In such a case, in 64-bit mode the effective address > + * relative to the RIP of the following instruction. > + */ > + if (addr_offset == -EDOM) { > + eff_addr = 0; > + if (user_64bit_mode(regs)) > + eff_addr = (long)regs->ip + > + insn->length; Let that line stick out and write it balanced: if (addr_offset == -EDOM) { if (user_64bit_mode(regs)) eff_addr = (long)regs->ip + insn->length; else eff_addr = 0; should be easier parseable this way. -- Regards/Gruss, Boris. SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg) --