From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>,
Christoph Hellwig <hch@lst.de>, Ingo Molnar <mingo@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Michael Ellerman <mpe@ellerman.id.au>,
Jens Axboe <axboe@kernel.dk>, Keith Busch <keith.busch@intel.com>
Subject: [patch 17/55] genirq/debugfs: Add proper debugfs interface
Date: Tue, 20 Jun 2017 01:37:17 +0200 [thread overview]
Message-ID: <20170619235444.537566163@linutronix.de> (raw)
In-Reply-To: 20170619233700.547167146@linutronix.de
[-- Attachment #1: genirq-debugfs--Add-proper-debugfs-interface.patch --]
[-- Type: text/plain, Size: 15558 bytes --]
Debugging (hierarchical) interupt domains is tedious as there is no
information about the hierarchy and no information about states of
interrupts in the various domain levels.
Add a debugfs directory 'irq' and subdirectories 'domains' and 'irqs'.
The domains directory contains the domain files. The content is information
about the domain. If the domain is part of a hierarchy then the parent
domains are printed as well.
# ls /sys/kernel/debug/irq/domains/
default INTEL-IR-2 INTEL-IR-MSI-2 IO-APIC-IR-2 PCI-MSI
DMAR-MSI INTEL-IR-3 INTEL-IR-MSI-3 IO-APIC-IR-3 unknown-1
INTEL-IR-0 INTEL-IR-MSI-0 IO-APIC-IR-0 IO-APIC-IR-4 VECTOR
INTEL-IR-1 INTEL-IR-MSI-1 IO-APIC-IR-1 PCI-HT
# cat /sys/kernel/debug/irq/domains/VECTOR
name: VECTOR
size: 0
mapped: 216
flags: 0x00000041
# cat /sys/kernel/debug/irq/domains/IO-APIC-IR-0
name: IO-APIC-IR-0
size: 24
mapped: 19
flags: 0x00000041
parent: INTEL-IR-3
name: INTEL-IR-3
size: 65536
mapped: 167
flags: 0x00000041
parent: VECTOR
name: VECTOR
size: 0
mapped: 216
flags: 0x00000041
Unfortunately there is no per cpu information about the VECTOR domain (yet).
The irqs directory contains detailed information about mapped interrupts.
# cat /sys/kernel/debug/irq/irqs/3
handler: handle_edge_irq
status: 0x00004000
istate: 0x00000000
ddepth: 1
wdepth: 0
dstate: 0x01018000
IRQD_IRQ_DISABLED
IRQD_SINGLE_TARGET
IRQD_MOVE_PCNTXT
node: 0
affinity: 0-143
effectiv: 0
pending:
domain: IO-APIC-IR-0
hwirq: 0x3
chip: IR-IO-APIC
flags: 0x10
IRQCHIP_SKIP_SET_WAKE
parent:
domain: INTEL-IR-3
hwirq: 0x20000
chip: INTEL-IR
flags: 0x0
parent:
domain: VECTOR
hwirq: 0x3
chip: APIC
flags: 0x0
This was developed to simplify the debugging of the managed affinity
changes.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
include/linux/irqdesc.h | 4
include/linux/irqdomain.h | 4
kernel/irq/Kconfig | 11 ++
kernel/irq/Makefile | 1
kernel/irq/debugfs.c | 215 ++++++++++++++++++++++++++++++++++++++++++++++
kernel/irq/internals.h | 22 ++++
kernel/irq/irqdesc.c | 1
kernel/irq/irqdomain.c | 87 ++++++++++++++++++
kernel/irq/manage.c | 1
9 files changed, 345 insertions(+), 1 deletion(-)
--- a/include/linux/irqdesc.h
+++ b/include/linux/irqdesc.h
@@ -46,6 +46,7 @@ struct pt_regs;
* @rcu: rcu head for delayed free
* @kobj: kobject used to represent this struct in sysfs
* @dir: /proc/irq/ procfs entry
+ * @debugfs_file: dentry for the debugfs file
* @name: flow handler name for /proc/interrupts output
*/
struct irq_desc {
@@ -88,6 +89,9 @@ struct irq_desc {
#ifdef CONFIG_PROC_FS
struct proc_dir_entry *dir;
#endif
+#ifdef CONFIG_GENERIC_IRQ_DEBUGFS
+ struct dentry *debugfs_file;
+#endif
#ifdef CONFIG_SPARSE_IRQ
struct rcu_head rcu;
struct kobject kobj;
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
@@ -139,6 +139,7 @@ struct irq_domain_chip_generic;
* setting up one or more generic chips for interrupt controllers
* drivers using the generic chip library which uses this pointer.
* @parent: Pointer to parent irq_domain to support hierarchy irq_domains
+ * @debugfs_file: dentry for the domain debugfs file
*
* Revmap data, used internally by irq_domain
* @revmap_direct_max_irq: The largest hwirq that can be set for controllers that
@@ -162,6 +163,9 @@ struct irq_domain {
#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
struct irq_domain *parent;
#endif
+#ifdef CONFIG_GENERIC_IRQ_DEBUGFS
+ struct dentry *debugfs_file;
+#endif
/* reverse map data. The linear map gets appended to the irq_domain */
irq_hw_number_t hwirq_max;
--- a/kernel/irq/Kconfig
+++ b/kernel/irq/Kconfig
@@ -108,4 +108,15 @@ config SPARSE_IRQ
If you don't know what to do here, say N.
+config GENERIC_IRQ_DEBUGFS
+ bool "Expose irq internals in debugfs"
+ depends on DEBUG_FS
+ default n
+ ---help---
+
+ Exposes internal state information through debugfs. Mostly for
+ developers and debugging of hard to diagnose interrupt problems.
+
+ If you don't know what to do here, say N.
+
endmenu
--- a/kernel/irq/Makefile
+++ b/kernel/irq/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_PM_SLEEP) += pm.o
obj-$(CONFIG_GENERIC_MSI_IRQ) += msi.o
obj-$(CONFIG_GENERIC_IRQ_IPI) += ipi.o
obj-$(CONFIG_SMP) += affinity.o
+obj-$(CONFIG_GENERIC_IRQ_DEBUGFS) += debugfs.o
--- /dev/null
+++ b/kernel/irq/debugfs.c
@@ -0,0 +1,215 @@
+/*
+ * Copyright 2017 Thomas Gleixner <tglx@linutronix.de>
+ *
+ * This file is licensed under the GPL V2.
+ */
+#include <linux/debugfs.h>
+#include <linux/irqdomain.h>
+#include <linux/irq.h>
+
+#include "internals.h"
+
+static struct dentry *irq_dir;
+
+struct irq_bit_descr {
+ unsigned int mask;
+ char *name;
+};
+#define BIT_MASK_DESCR(m) { .mask = m, .name = #m }
+
+static void irq_debug_show_bits(struct seq_file *m, int ind, unsigned int state,
+ const struct irq_bit_descr *sd, int size)
+{
+ int i;
+
+ for (i = 0; i < size; i++, sd++) {
+ if (state & sd->mask)
+ seq_printf(m, "%*s%s\n", ind + 12, "", sd->name);
+ }
+}
+
+#ifdef CONFIG_SMP
+static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc)
+{
+ struct irq_data *data = irq_desc_get_irq_data(desc);
+ struct cpumask *msk;
+
+ msk = irq_data_get_affinity_mask(data);
+ seq_printf(m, "affinity: %*pbl\n", cpumask_pr_args(msk));
+#ifdef CONFIG_GENERIC_PENDING_IRQ
+ msk = desc->pending_mask;
+ seq_printf(m, "pending: %*pbl\n", cpumask_pr_args(msk));
+#endif
+}
+#else
+static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc) { }
+#endif
+
+static const struct irq_bit_descr irqchip_flags[] = {
+ BIT_MASK_DESCR(IRQCHIP_SET_TYPE_MASKED),
+ BIT_MASK_DESCR(IRQCHIP_EOI_IF_HANDLED),
+ BIT_MASK_DESCR(IRQCHIP_MASK_ON_SUSPEND),
+ BIT_MASK_DESCR(IRQCHIP_ONOFFLINE_ENABLED),
+ BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE),
+ BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE),
+ BIT_MASK_DESCR(IRQCHIP_EOI_THREADED),
+};
+
+static void
+irq_debug_show_chip(struct seq_file *m, struct irq_data *data, int ind)
+{
+ struct irq_chip *chip = data->chip;
+
+ if (!chip) {
+ seq_printf(m, "chip: None\n");
+ return;
+ }
+ seq_printf(m, "%*schip: %s\n", ind, "", chip->name);
+ seq_printf(m, "%*sflags: 0x%lx\n", ind + 1, "", chip->flags);
+ irq_debug_show_bits(m, ind, chip->flags, irqchip_flags,
+ ARRAY_SIZE(irqchip_flags));
+}
+
+static void
+irq_debug_show_data(struct seq_file *m, struct irq_data *data, int ind)
+{
+ seq_printf(m, "%*sdomain: %s\n", ind, "",
+ data->domain ? data->domain->name : "");
+ seq_printf(m, "%*shwirq: 0x%lx\n", ind + 1, "", data->hwirq);
+ irq_debug_show_chip(m, data, ind + 1);
+#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
+ if (!data->parent_data)
+ return;
+ seq_printf(m, "%*sparent:\n", ind + 1, "");
+ irq_debug_show_data(m, data->parent_data, ind + 4);
+#endif
+}
+
+static const struct irq_bit_descr irqdata_states[] = {
+ BIT_MASK_DESCR(IRQ_TYPE_EDGE_RISING),
+ BIT_MASK_DESCR(IRQ_TYPE_EDGE_FALLING),
+ BIT_MASK_DESCR(IRQ_TYPE_LEVEL_HIGH),
+ BIT_MASK_DESCR(IRQ_TYPE_LEVEL_LOW),
+ BIT_MASK_DESCR(IRQD_LEVEL),
+
+ BIT_MASK_DESCR(IRQD_ACTIVATED),
+ BIT_MASK_DESCR(IRQD_IRQ_STARTED),
+ BIT_MASK_DESCR(IRQD_IRQ_DISABLED),
+ BIT_MASK_DESCR(IRQD_IRQ_MASKED),
+ BIT_MASK_DESCR(IRQD_IRQ_INPROGRESS),
+
+ BIT_MASK_DESCR(IRQD_PER_CPU),
+ BIT_MASK_DESCR(IRQD_NO_BALANCING),
+
+ BIT_MASK_DESCR(IRQD_MOVE_PCNTXT),
+ BIT_MASK_DESCR(IRQD_AFFINITY_SET),
+ BIT_MASK_DESCR(IRQD_SETAFFINITY_PENDING),
+ BIT_MASK_DESCR(IRQD_AFFINITY_MANAGED),
+ BIT_MASK_DESCR(IRQD_MANAGED_SHUTDOWN),
+
+ BIT_MASK_DESCR(IRQD_FORWARDED_TO_VCPU),
+
+ BIT_MASK_DESCR(IRQD_WAKEUP_STATE),
+ BIT_MASK_DESCR(IRQD_WAKEUP_ARMED),
+};
+
+static const struct irq_bit_descr irqdesc_states[] = {
+ BIT_MASK_DESCR(_IRQ_NOPROBE),
+ BIT_MASK_DESCR(_IRQ_NOREQUEST),
+ BIT_MASK_DESCR(_IRQ_NOTHREAD),
+ BIT_MASK_DESCR(_IRQ_NOAUTOEN),
+ BIT_MASK_DESCR(_IRQ_NESTED_THREAD),
+ BIT_MASK_DESCR(_IRQ_PER_CPU_DEVID),
+ BIT_MASK_DESCR(_IRQ_IS_POLLED),
+ BIT_MASK_DESCR(_IRQ_DISABLE_UNLAZY),
+};
+
+static const struct irq_bit_descr irqdesc_istates[] = {
+ BIT_MASK_DESCR(IRQS_AUTODETECT),
+ BIT_MASK_DESCR(IRQS_SPURIOUS_DISABLED),
+ BIT_MASK_DESCR(IRQS_POLL_INPROGRESS),
+ BIT_MASK_DESCR(IRQS_ONESHOT),
+ BIT_MASK_DESCR(IRQS_REPLAY),
+ BIT_MASK_DESCR(IRQS_WAITING),
+ BIT_MASK_DESCR(IRQS_PENDING),
+ BIT_MASK_DESCR(IRQS_SUSPENDED),
+};
+
+
+static int irq_debug_show(struct seq_file *m, void *p)
+{
+ struct irq_desc *desc = m->private;
+ struct irq_data *data;
+
+ raw_spin_lock_irq(&desc->lock);
+ data = irq_desc_get_irq_data(desc);
+ seq_printf(m, "handler: %pf\n", desc->handle_irq);
+ seq_printf(m, "status: 0x%08x\n", desc->status_use_accessors);
+ irq_debug_show_bits(m, 0, desc->status_use_accessors, irqdesc_states,
+ ARRAY_SIZE(irqdesc_states));
+ seq_printf(m, "istate: 0x%08x\n", desc->istate);
+ irq_debug_show_bits(m, 0, desc->istate, irqdesc_istates,
+ ARRAY_SIZE(irqdesc_istates));
+ seq_printf(m, "ddepth: %u\n", desc->depth);
+ seq_printf(m, "wdepth: %u\n", desc->wake_depth);
+ seq_printf(m, "dstate: 0x%08x\n", irqd_get(data));
+ irq_debug_show_bits(m, 0, irqd_get(data), irqdata_states,
+ ARRAY_SIZE(irqdata_states));
+ seq_printf(m, "node: %d\n", irq_data_get_node(data));
+ irq_debug_show_masks(m, desc);
+ irq_debug_show_data(m, data, 0);
+ raw_spin_unlock_irq(&desc->lock);
+ return 0;
+}
+
+static int irq_debug_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, irq_debug_show, inode->i_private);
+}
+
+static const struct file_operations dfs_irq_ops = {
+ .open = irq_debug_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc)
+{
+ char name [10];
+
+ if (!irq_dir || !desc || desc->debugfs_file)
+ return;
+
+ sprintf(name, "%d", irq);
+ desc->debugfs_file = debugfs_create_file(name, 0x444, irq_dir, desc,
+ &dfs_irq_ops);
+}
+
+void irq_remove_debugfs_entry(struct irq_desc *desc)
+{
+ if (desc->debugfs_file)
+ debugfs_remove(desc->debugfs_file);
+}
+
+static int __init irq_debugfs_init(void)
+{
+ struct dentry *root_dir;
+ int irq;
+
+ root_dir = debugfs_create_dir("irq", NULL);
+ if (!root_dir)
+ return -ENOMEM;
+
+ irq_domain_debugfs_init(root_dir);
+
+ irq_dir = debugfs_create_dir("irqs", root_dir);
+
+ irq_lock_sparse();
+ for_each_active_irq(irq)
+ irq_add_debugfs_entry(irq, irq_to_desc(irq));
+ irq_unlock_sparse();
+
+ return 0;
+}
+__initcall(irq_debugfs_init);
--- a/kernel/irq/internals.h
+++ b/kernel/irq/internals.h
@@ -169,6 +169,11 @@ irq_put_desc_unlock(struct irq_desc *des
#define __irqd_to_state(d) ACCESS_PRIVATE((d)->common, state_use_accessors)
+static inline unsigned int irqd_get(struct irq_data *d)
+{
+ return __irqd_to_state(d);
+}
+
/*
* Manipulation functions for irq_data.state
*/
@@ -226,3 +231,20 @@ irq_pm_install_action(struct irq_desc *d
static inline void
irq_pm_remove_action(struct irq_desc *desc, struct irqaction *action) { }
#endif
+
+#ifdef CONFIG_GENERIC_IRQ_DEBUGFS
+void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc);
+void irq_remove_debugfs_entry(struct irq_desc *desc);
+# ifdef CONFIG_IRQ_DOMAIN
+void irq_domain_debugfs_init(struct dentry *root);
+# else
+static inline void irq_domain_debugfs_init(struct dentry *root);
+# endif
+#else /* CONFIG_GENERIC_IRQ_DEBUGFS */
+static inline void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *d)
+{
+}
+static inline void irq_remove_debugfs_entry(struct irq_desc *d)
+{
+}
+#endif /* CONFIG_GENERIC_IRQ_DEBUGFS */
--- a/kernel/irq/irqdesc.c
+++ b/kernel/irq/irqdesc.c
@@ -394,6 +394,7 @@ static void free_desc(unsigned int irq)
{
struct irq_desc *desc = irq_to_desc(irq);
+ irq_remove_debugfs_entry(desc);
unregister_irq_proc(irq, desc);
/*
--- a/kernel/irq/irqdomain.c
+++ b/kernel/irq/irqdomain.c
@@ -29,9 +29,17 @@ struct irqchip_fwid {
struct fwnode_handle fwnode;
unsigned int type;
char *name;
- void *data;
+ void *data;
};
+#ifdef CONFIG_GENERIC_IRQ_DEBUGFS
+static void debugfs_add_domain_dir(struct irq_domain *d);
+static void debugfs_remove_domain_dir(struct irq_domain *d);
+#else
+static inline void debugfs_add_domain_dir(struct irq_domain *d) { }
+static inline void debugfs_remove_domain_dir(struct irq_domain *d) { }
+#endif
+
/**
* irq_domain_alloc_fwnode - Allocate a fwnode_handle suitable for
* identifying an irq domain
@@ -172,6 +180,7 @@ struct irq_domain *__irq_domain_add(stru
irq_domain_check_hierarchy(domain);
mutex_lock(&irq_domain_mutex);
+ debugfs_add_domain_dir(domain);
list_add(&domain->link, &irq_domain_list);
mutex_unlock(&irq_domain_mutex);
@@ -191,6 +200,7 @@ EXPORT_SYMBOL_GPL(__irq_domain_add);
void irq_domain_remove(struct irq_domain *domain)
{
mutex_lock(&irq_domain_mutex);
+ debugfs_remove_domain_dir(domain);
WARN_ON(!radix_tree_empty(&domain->revmap_tree));
@@ -1577,3 +1587,78 @@ static void irq_domain_check_hierarchy(s
{
}
#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
+
+#ifdef CONFIG_GENERIC_IRQ_DEBUGFS
+static struct dentry *domain_dir;
+
+static void
+irq_domain_debug_show_one(struct seq_file *m, struct irq_domain *d, int ind)
+{
+ seq_printf(m, "%*sname: %s\n", ind, "", d->name);
+ seq_printf(m, "%*ssize: %u\n", ind + 1, "",
+ d->revmap_size + d->revmap_direct_max_irq);
+ seq_printf(m, "%*smapped: %u\n", ind + 1, "", d->mapcount);
+ seq_printf(m, "%*sflags: 0x%08x\n", ind +1 , "", d->flags);
+#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
+ if (!d->parent)
+ return;
+ seq_printf(m, "%*sparent: %s\n", ind + 1, "", d->parent->name);
+ irq_domain_debug_show_one(m, d->parent, ind + 4);
+#endif
+}
+
+static int irq_domain_debug_show(struct seq_file *m, void *p)
+{
+ struct irq_domain *d = m->private;
+
+ /* Default domain? Might be NULL */
+ if (!d) {
+ if (!irq_default_domain)
+ return 0;
+ d = irq_default_domain;
+ }
+ irq_domain_debug_show_one(m, d, 0);
+ return 0;
+}
+
+static int irq_domain_debug_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, irq_domain_debug_show, inode->i_private);
+}
+
+static const struct file_operations dfs_domain_ops = {
+ .open = irq_domain_debug_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+static void debugfs_add_domain_dir(struct irq_domain *d)
+{
+ if (!d->name || !domain_dir || d->debugfs_file)
+ return;
+ d->debugfs_file = debugfs_create_file(d->name, 0x444, domain_dir, d,
+ &dfs_domain_ops);
+}
+
+static void debugfs_remove_domain_dir(struct irq_domain *d)
+{
+ if (d->debugfs_file)
+ debugfs_remove(d->debugfs_file);
+}
+
+void __init irq_domain_debugfs_init(struct dentry *root)
+{
+ struct irq_domain *d;
+
+ domain_dir = debugfs_create_dir("domains", root);
+ if (!domain_dir)
+ return;
+
+ debugfs_create_file("default", 0444, domain_dir, NULL, &dfs_domain_ops);
+ mutex_lock(&irq_domain_mutex);
+ list_for_each_entry(d, &irq_domain_list, link)
+ debugfs_add_domain_dir(d);
+ mutex_unlock(&irq_domain_mutex);
+}
+#endif
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -1396,6 +1396,7 @@ static int
wake_up_process(new->secondary->thread);
register_irq_proc(irq, desc);
+ irq_add_debugfs_entry(irq, desc);
new->dir = NULL;
register_handler_proc(irq, new);
free_cpumask_var(mask);
next prev parent reply other threads:[~2017-06-20 0:00 UTC|newest]
Thread overview: 122+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-19 23:37 [patch 00/55] genirq: Debuggability, consolidation and managed affinities Thomas Gleixner
2017-06-19 23:37 ` [patch 01/55] x86/apic: Add name to irq chip Thomas Gleixner
2017-06-22 16:40 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 02/55] iommu/amd: " Thomas Gleixner
2017-06-21 15:51 ` Joerg Roedel
2017-06-22 16:40 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 03/55] iommu/vt-d: " Thomas Gleixner
2017-06-21 15:51 ` Joerg Roedel
2017-06-22 16:41 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 04/55] genirq/msi: Prevent overwriting domain name Thomas Gleixner
2017-06-22 16:41 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 05/55] genirq: Allow fwnode to carry name information only Thomas Gleixner
2017-06-22 16:42 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 06/55] x86/vector: Create named irq domain Thomas Gleixner
2017-06-22 16:42 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 07/55] x86/ioapic: " Thomas Gleixner
2017-06-22 16:43 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 08/55] x86/htirq: Create named domain Thomas Gleixner
2017-06-22 16:44 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 09/55] x86/uv: Create named irq domain Thomas Gleixner
2017-06-22 16:44 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 10/55] x86/msi: Provide new iommu irqdomain interface Thomas Gleixner
2017-06-22 16:45 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 11/55] iommu/vt-d: Use named irq domain interface Thomas Gleixner
2017-06-21 15:52 ` Joerg Roedel
2017-06-22 16:45 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 12/55] iommu/amd: " Thomas Gleixner
2017-06-21 15:52 ` Joerg Roedel
2017-06-22 16:46 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 13/55] x86/msi: Remove unused remap " Thomas Gleixner
2017-06-22 16:46 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 14/55] x86/msi: Create named irq domains Thomas Gleixner
2017-06-22 16:47 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 15/55] PCI: vmd: Create named irq domain Thomas Gleixner
2017-06-20 20:07 ` Keith Busch
2017-06-20 20:07 ` Thomas Gleixner
2017-06-20 20:39 ` Thomas Gleixner
2017-06-22 16:47 ` [tip:irq/core] PCI/vmd: " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 16/55] genirq/irqdomain: Add map counter Thomas Gleixner
2017-06-22 16:48 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` Thomas Gleixner [this message]
2017-06-22 16:49 ` [tip:irq/core] genirq/debugfs: Add proper debugfs interface tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 18/55] genirq: Add missing comment for IRQD_STARTED Thomas Gleixner
2017-06-22 16:49 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 19/55] genirq: Provide irq_fixup_move_pending() Thomas Gleixner
2017-06-20 4:21 ` Dou Liyang
2017-06-20 6:58 ` Thomas Gleixner
2017-06-22 16:50 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 20/55] x86/irq: Cleanup pending irq move in fixup_irqs() Thomas Gleixner
2017-06-22 16:50 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 21/55] genirq: Remove mask argument from setup_affinity() Thomas Gleixner
2017-06-22 16:51 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 22/55] genirq: Rename setup_affinity() to irq_setup_affinity() Thomas Gleixner
2017-06-22 16:52 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 23/55] genirq: Move initial affinity setup to irq_startup() Thomas Gleixner
2017-06-22 16:52 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 24/55] genirq: Move pending helpers to internal.h Thomas Gleixner
2017-06-22 16:53 ` [tip:irq/core] " tip-bot for Christoph Hellwig
2017-06-19 23:37 ` [patch 25/55] genirq/cpuhotplug: Remove irq disabling logic Thomas Gleixner
2017-06-22 16:53 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 26/55] genirq/cpuhotplug: Dont claim success on error Thomas Gleixner
2017-06-22 16:54 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 27/55] genirq/cpuhotplug: Reorder check logic Thomas Gleixner
2017-06-22 16:54 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 28/55] genirq/cpuhotplug: Do not migrated shutdown irqs Thomas Gleixner
2017-06-22 16:55 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 29/55] genirq/cpuhotplug: Add support for cleaning up move in progress Thomas Gleixner
2017-06-22 16:56 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 30/55] genirq/cpuhotplug: Add support for conditional masking Thomas Gleixner
2017-06-22 16:56 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 31/55] genirq/cpuhotplug: Set force affinity flag on hotplug migration Thomas Gleixner
2017-06-22 16:57 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 32/55] x86/irq: Restructure fixup_irqs() Thomas Gleixner
2017-06-20 21:34 ` Keith Busch
2017-06-20 21:28 ` Thomas Gleixner
2017-06-22 16:57 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 33/55] x86/irq: Use irq_migrate_all_off_this_cpu() Thomas Gleixner
2017-06-22 16:58 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 34/55] genirq: Move irq_fixup_move_pending() to core Thomas Gleixner
2017-06-22 16:58 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 35/55] genirq: Remove pointless arg from show_irq_affinity Thomas Gleixner
2017-06-22 16:59 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 36/55] genirq: Remove pointless gfp argument Thomas Gleixner
2017-06-22 17:00 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 37/55] genirq/proc: Replace ever repeating type cast Thomas Gleixner
2017-06-22 17:00 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 38/55] genirq: Introduce effective affinity mask Thomas Gleixner
2017-06-22 17:01 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 39/55] genirq/cpuhotplug: Use " Thomas Gleixner
2017-06-22 17:01 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 40/55] x86/apic: Move flat_cpu_mask_to_apicid_and() into C source Thomas Gleixner
2017-06-22 17:02 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 41/55] x86/uv: Use default_cpu_mask_to_apicid_and() Thomas Gleixner
2017-06-22 17:03 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 42/55] x86/apic: Move online masking to core code Thomas Gleixner
2017-06-22 17:03 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 43/55] x86/apic: Move cpumask and " Thomas Gleixner
2017-06-22 17:04 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 44/55] x86/apic: Add irq_data argument to apic->cpu_mask_to_apicid() Thomas Gleixner
2017-06-22 17:04 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 45/55] xen/events: Add support for effective affinity mask Thomas Gleixner
2017-06-22 17:05 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 46/55] x86/apic: Implement effective irq mask update Thomas Gleixner
2017-06-22 17:05 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 47/55] genirq: Introduce IRQD_MANAGED_SHUTDOWN Thomas Gleixner
2017-06-22 17:06 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 48/55] genirq: Split out irq_startup() code Thomas Gleixner
2017-06-22 17:06 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 49/55] genirq: Add force argument to irq_startup() Thomas Gleixner
2017-06-22 17:07 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 50/55] genirq: Handle managed irqs gracefully in irq_startup() Thomas Gleixner
2017-06-22 17:08 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 51/55] genirq/cpuhotplug: Handle managed IRQs on CPU hotplug Thomas Gleixner
2017-06-22 17:08 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 52/55] genirq: Introduce IRQD_SINGLE_TARGET flag Thomas Gleixner
2017-06-22 17:09 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 53/55] genirq/cpuhotplug: Avoid irq affinity setting for single targets Thomas Gleixner
2017-06-22 17:09 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 54/55] x86/apic: Mark single target interrupts Thomas Gleixner
2017-06-22 17:10 ` [tip:irq/core] " tip-bot for Thomas Gleixner
2017-06-19 23:37 ` [patch 55/55] genirq/affinity: Assign vectors to all present CPUs Thomas Gleixner
2017-06-20 9:23 ` [patch 00/55] genirq: Debuggability, consolidation and managed affinities Christoph Hellwig
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