From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751692AbdF0AQ4 (ORCPT ); Mon, 26 Jun 2017 20:16:56 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:34246 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751480AbdF0AQs (ORCPT ); Mon, 26 Jun 2017 20:16:48 -0400 Date: Mon, 26 Jun 2017 17:16:37 -0700 From: Ram Pai To: Balbir Singh Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-mm@kvack.org, x86@kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au, khandual@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com, dave.hansen@intel.com, hbabu@us.ibm.com, arnd@arndb.de, akpm@linux-foundation.org, corbet@lwn.net, mingo@redhat.com Subject: Re: [RFC v3 02/23] powerpc: introduce set_hidx_slot helper Reply-To: Ram Pai References: <1498095579-6790-1-git-send-email-linuxram@us.ibm.com> <1498095579-6790-3-git-send-email-linuxram@us.ibm.com> <1498431798.7935.5.camel@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1498431798.7935.5.camel@gmail.com> User-Agent: Mutt/1.5.20 (2009-12-10) X-TM-AS-GCONF: 00 x-cbid: 17062700-0040-0000-0000-0000036E16CF X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00007283; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000214; SDB=6.00879175; UDB=6.00438153; IPR=6.00659329; BA=6.00005443; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00015961; XFM=3.00000015; UTC=2017-06-27 00:16:45 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17062700-0041-0000-0000-0000076233DB Message-Id: <20170627001637.GA5846@ram.oc3035372033.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-06-26_17:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1703280000 definitions=main-1706270002 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jun 26, 2017 at 09:03:18AM +1000, Balbir Singh wrote: > On Wed, 2017-06-21 at 18:39 -0700, Ram Pai wrote: > > Introduce set_hidx_slot() which sets the (H_PAGE_F_SECOND|H_PAGE_F_GIX) > > bits at the appropriate location in the PTE of 4K PTE. In the > > case of 64K PTE, it sets the bits in the second part of the PTE. Though > > the implementation for the former just needs the slot parameter, it does > > take some additional parameters to keep the prototype consistent. > > > > This function will come in handy as we work towards re-arranging the > > bits in the later patches. > > > > Signed-off-by: Ram Pai > > --- > > arch/powerpc/include/asm/book3s/64/hash-4k.h | 7 +++++++ > > arch/powerpc/include/asm/book3s/64/hash-64k.h | 16 ++++++++++++++++ > > 2 files changed, 23 insertions(+) > > > > diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h > > index 9c2c8f1..cef644c 100644 > > --- a/arch/powerpc/include/asm/book3s/64/hash-4k.h > > +++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h > > @@ -55,6 +55,13 @@ static inline int hash__hugepd_ok(hugepd_t hpd) > > } > > #endif > > > > +static inline unsigned long set_hidx_slot(pte_t *ptep, real_pte_t rpte, > > + unsigned int subpg_index, unsigned long slot) > > +{ > > + return (slot << H_PAGE_F_GIX_SHIFT) & > > + (H_PAGE_F_SECOND | H_PAGE_F_GIX); > > +} > > + > > A comment on top would help explain that 4k and 64k are different, 64k > is a new layout. ok. > > > #ifdef CONFIG_TRANSPARENT_HUGEPAGE > > > > static inline char *get_hpte_slot_array(pmd_t *pmdp) > > diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h b/arch/powerpc/include/asm/book3s/64/hash-64k.h > > index 3f49941..4bac70a 100644 > > --- a/arch/powerpc/include/asm/book3s/64/hash-64k.h > > +++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h > > @@ -75,6 +75,22 @@ static inline unsigned long __rpte_to_hidx(real_pte_t rpte, unsigned long index) > > return (pte_val(rpte.pte) >> H_PAGE_F_GIX_SHIFT) & 0xf; > > } > > > > +static inline unsigned long set_hidx_slot(pte_t *ptep, real_pte_t rpte, > > + unsigned int subpg_index, unsigned long slot) > > +{ > > + unsigned long *hidxp = (unsigned long *)(ptep + PTRS_PER_PTE); > > + > > + rpte.hidx &= ~(0xfUL << (subpg_index << 2)); > > + *hidxp = rpte.hidx | (slot << (subpg_index << 2)); > > + /* > > + * Avoid race with __real_pte() > > + * hidx must be committed to memory before committing > > + * the pte. > > + */ > > + smp_wmb(); > > Whats the other paired barrier, is it in set_pte()? __real_pte() reads the hidx. The smp_rmb() is in that function. > > > + return 0x0UL; > > +} > > We return 0 here and slot information for 4k pages, it is not that > clear We return 0 here and commit the 4k-hpte hidx. RP