From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752420AbdF3KBm (ORCPT ); Fri, 30 Jun 2017 06:01:42 -0400 Received: from foss.arm.com ([217.140.101.70]:39972 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751927AbdF3J77 (ORCPT ); Fri, 30 Jun 2017 05:59:59 -0400 From: Andre Przywara To: Jassi Brar , Sudeep Holla Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Maxime Ripard , Chen-Yu Tsai , Icenowy Zheng , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH 4/8] arm64: dts: allwinner: a64: add SCPI support Date: Fri, 30 Jun 2017 10:56:04 +0100 Message-Id: <20170630095608.24943-5-andre.przywara@arm.com> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20170630095608.24943-1-andre.przywara@arm.com> References: <20170630095608.24943-1-andre.przywara@arm.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds support for the SCPI protocol using an SMC mailbox and some shared memory in SRAM. The SCPI provider is implemented in the ARM Trusted Firmware layer (running in EL3 on the application processor cores), triggered by an smc call. Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 9d00622..ef6f10e 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -124,6 +124,32 @@ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + mailbox: mbox@0 { + compatible = "arm,smc-mbox"; + #mbox-cells = <1>; + arm,smc-func-ids = <0x82000001>; + }; + + sram: sram@10000{ + compatible = "mmio-sram"; + reg = <0x10000 0x8000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x10000 0x8000>; + + cpu_scp_mem: scp-shmem@7e00 { + compatible = "mmio-sram"; + reg = <0x7e00 0x200>; + }; + }; + + scpi { + compatible = "arm,scpi"; + mboxes = <&mailbox 0>; + shmem = <&cpu_scp_mem>; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; -- 2.9.0