From: Peter Zijlstra <peterz@infradead.org>
To: Andy Lutomirski <luto@kernel.org>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
Borislav Petkov <bp@alien8.de>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
Mel Gorman <mgorman@suse.de>,
"linux-mm@kvack.org" <linux-mm@kvack.org>,
Nadav Amit <nadav.amit@gmail.com>, Rik van Riel <riel@redhat.com>,
Dave Hansen <dave.hansen@intel.com>,
Arjan van de Ven <arjan@linux.intel.com>
Subject: Re: [PATCH v4 10/10] x86/mm: Try to preserve old TLB entries using PCID
Date: Wed, 5 Jul 2017 14:18:07 +0200 [thread overview]
Message-ID: <20170705121807.GF4941@worktop> (raw)
In-Reply-To: <cf600d28712daa8e2222c08a10f6c914edab54f2.1498751203.git.luto@kernel.org>
On Thu, Jun 29, 2017 at 08:53:22AM -0700, Andy Lutomirski wrote:
> @@ -104,18 +140,20 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
>
> /* Resume remote flushes and then read tlb_gen. */
> cpumask_set_cpu(cpu, mm_cpumask(next));
Barriers should have a comment... what is being ordered here against
what?
> + smp_mb__after_atomic();
> next_tlb_gen = atomic64_read(&next->context.tlb_gen);
>
> + if (this_cpu_read(cpu_tlbstate.ctxs[prev_asid].tlb_gen) <
> + next_tlb_gen) {
> /*
> * Ideally, we'd have a flush_tlb() variant that
> * takes the known CR3 value as input. This would
> * be faster on Xen PV and on hypothetical CPUs
> * on which INVPCID is fast.
> */
> + this_cpu_write(cpu_tlbstate.ctxs[prev_asid].tlb_gen,
> next_tlb_gen);
> + write_cr3(__pa(next->pgd) | prev_asid);
> trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH,
> TLB_FLUSH_ALL);
> }
> @@ -152,14 +190,25 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
> * Start remote flushes and then read tlb_gen.
> */
> cpumask_set_cpu(cpu, mm_cpumask(next));
> + smp_mb__after_atomic();
idem
> next_tlb_gen = atomic64_read(&next->context.tlb_gen);
>
> + choose_new_asid(next, next_tlb_gen, &new_asid, &need_flush);
>
> + if (need_flush) {
> + this_cpu_write(cpu_tlbstate.ctxs[new_asid].ctx_id, next->context.ctx_id);
> + this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen);
> + write_cr3(__pa(next->pgd) | new_asid);
> + trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH,
> + TLB_FLUSH_ALL);
> + } else {
> + /* The new ASID is already up to date. */
> + write_cr3(__pa(next->pgd) | new_asid | CR3_NOFLUSH);
> + trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, 0);
> + }
> +
> + this_cpu_write(cpu_tlbstate.loaded_mm, next);
> + this_cpu_write(cpu_tlbstate.loaded_mm_asid, new_asid);
> }
>
> load_mm_cr4(next);
next prev parent reply other threads:[~2017-07-05 12:18 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-29 15:53 [PATCH v4 00/10] PCID and improved laziness Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 01/10] x86/mm: Don't reenter flush_tlb_func_common() Andy Lutomirski
2017-06-30 13:11 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 02/10] x86/mm: Delete a big outdated comment about TLB flushing Andy Lutomirski
2017-06-30 13:11 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 03/10] x86/mm: Give each mm TLB flush generation a unique ID Andy Lutomirski
2017-07-05 10:31 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-07-05 10:58 ` Peter Zijlstra
2017-06-29 15:53 ` [PATCH v4 04/10] x86/mm: Track the TLB's tlb_gen and update the flushing algorithm Andy Lutomirski
2017-07-05 10:31 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 05/10] x86/mm: Rework lazy TLB mode and TLB freshness tracking Andy Lutomirski
2017-07-05 10:31 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 06/10] x86/mm: Stop calling leave_mm() in idle code Andy Lutomirski
2017-07-05 10:32 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 07/10] x86/mm: Disable PCID on 32-bit kernels Andy Lutomirski
2017-07-05 10:32 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 08/10] x86/mm: Add nopcid to turn off PCID Andy Lutomirski
2017-07-05 10:32 ` [tip:x86/mm] x86/mm: Add the 'nopcid' boot option " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 09/10] x86/mm: Enable CR4.PCIDE on supported systems Andy Lutomirski
2017-07-05 10:33 ` [tip:x86/mm] " tip-bot for Andy Lutomirski
2017-06-29 15:53 ` [PATCH v4 10/10] x86/mm: Try to preserve old TLB entries using PCID Andy Lutomirski
2017-07-03 10:56 ` Thomas Gleixner
2017-07-05 12:18 ` Peter Zijlstra [this message]
2017-07-05 16:04 ` Andy Lutomirski
2017-07-05 17:02 ` Peter Zijlstra
2017-07-18 8:53 ` Ingo Molnar
2017-07-18 17:06 ` Andy Lutomirski
2017-07-05 12:25 ` Peter Zijlstra
2017-07-05 16:10 ` Andy Lutomirski
2017-07-28 13:49 ` Peter Zijlstra
2017-06-30 12:44 ` [PATCH v4 00/10] PCID and improved laziness Matt Fleming
2017-07-11 11:32 ` Matt Fleming
2017-07-11 15:00 ` Andy Lutomirski
2017-07-13 19:36 ` Matt Fleming
2017-07-05 8:56 ` Ingo Molnar
2017-07-05 16:53 ` Linus Torvalds
2017-07-17 9:57 ` Mel Gorman
2017-07-17 15:06 ` Ingo Molnar
2017-07-17 15:56 ` Mel Gorman
[not found] ` <CALBSrqDW6pGjHxOmzfnkY_KoNeH6F=pTb8-tJ8r-zbu4prw9HQ@mail.gmail.com>
2017-09-12 19:32 ` Sai Praneeth Prakhya
2017-09-13 4:14 ` Sai Praneeth Prakhya
[not found] ` <428E07CE-6F76-4137-B568-B9794735A51F@amacapital.net>
2017-09-13 7:43 ` Ingo Molnar
2017-09-13 7:45 ` Ingo Molnar
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