From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
To: Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>
Cc: Andi Kleen <ak@linux.intel.com>,
Dave Hansen <dave.hansen@intel.com>,
Andy Lutomirski <luto@amacapital.net>,
Michal Hocko <mhocko@kernel.org>,
linux-mm@kvack.org, linux-kernel@vger.kernel.org,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>
Subject: [PATCHv3 01/13] mm, sparsemem: Allocate mem_section at runtime for SPARSEMEM_EXTREME
Date: Mon, 7 Aug 2017 17:14:39 +0300 [thread overview]
Message-ID: <20170807141451.80934-2-kirill.shutemov@linux.intel.com> (raw)
In-Reply-To: <20170807141451.80934-1-kirill.shutemov@linux.intel.com>
Size of mem_section array depends on size of physical address space.
In preparation for boot-time switching between paging modes on x86-64
we need to make allocation of mem_section dynamic.
The patch allocates the array on the first call to
sparse_memory_present_with_active_regions().
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
include/linux/mmzone.h | 2 +-
mm/page_alloc.c | 10 ++++++++++
mm/sparse.c | 3 +--
3 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h
index fc14b8b3f6ce..c8eb668eab79 100644
--- a/include/linux/mmzone.h
+++ b/include/linux/mmzone.h
@@ -1137,7 +1137,7 @@ struct mem_section {
#define SECTION_ROOT_MASK (SECTIONS_PER_ROOT - 1)
#ifdef CONFIG_SPARSEMEM_EXTREME
-extern struct mem_section *mem_section[NR_SECTION_ROOTS];
+extern struct mem_section **mem_section;
#else
extern struct mem_section mem_section[NR_SECTION_ROOTS][SECTIONS_PER_ROOT];
#endif
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 6d30e914afb6..639fd2dce0c4 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -5681,6 +5681,16 @@ void __init sparse_memory_present_with_active_regions(int nid)
unsigned long start_pfn, end_pfn;
int i, this_nid;
+#ifdef CONFIG_SPARSEMEM_EXTREME
+ if (!mem_section) {
+ unsigned long size, align;
+
+ size = sizeof(struct mem_section) * NR_SECTION_ROOTS;
+ align = 1 << (INTERNODE_CACHE_SHIFT);
+ mem_section = memblock_virt_alloc(size, align);
+ }
+#endif
+
for_each_mem_pfn_range(i, nid, &start_pfn, &end_pfn, &this_nid)
memory_present(this_nid, start_pfn, end_pfn);
}
diff --git a/mm/sparse.c b/mm/sparse.c
index 7b4be3fd5cac..3a226a8c1968 100644
--- a/mm/sparse.c
+++ b/mm/sparse.c
@@ -22,8 +22,7 @@
* 1) mem_section - memory sections, mem_map's for valid memory
*/
#ifdef CONFIG_SPARSEMEM_EXTREME
-struct mem_section *mem_section[NR_SECTION_ROOTS]
- ____cacheline_internodealigned_in_smp;
+struct mem_section **mem_section;
#else
struct mem_section mem_section[NR_SECTION_ROOTS][SECTIONS_PER_ROOT]
____cacheline_internodealigned_in_smp;
--
2.13.2
next prev parent reply other threads:[~2017-08-07 14:15 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-07 14:14 [PATCHv3 00/13] Boot-time switching between 4- and 5-level paging Kirill A. Shutemov
2017-08-07 14:14 ` Kirill A. Shutemov [this message]
2017-08-07 14:14 ` [PATCHv3 02/13] x86/kasan: Use the same shadow offset for " Kirill A. Shutemov
2017-08-07 14:14 ` [PATCHv3 03/13] x86/xen: Provide pre-built page tables only for XEN_PV and XEN_PVH Kirill A. Shutemov
2017-08-07 14:14 ` [PATCHv3 04/13] x86/xen: Drop 5-level paging support code from XEN_PV code Kirill A. Shutemov
2017-08-07 14:14 ` [PATCHv3 05/13] x86/boot/compressed/64: Detect and handle 5-level paging at boot-time Kirill A. Shutemov
2017-08-07 14:14 ` [PATCHv3 06/13] x86/mm: Make virtual memory layout movable for CONFIG_X86_5LEVEL Kirill A. Shutemov
2017-08-07 14:14 ` [PATCHv3 07/13] x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable Kirill A. Shutemov
2017-08-07 15:48 ` Andi Kleen
2017-08-07 14:14 ` [PATCHv3 08/13] x86/mm: Handle boot-time paging mode switching at early boot Kirill A. Shutemov
2017-08-07 14:14 ` [PATCHv3 09/13] x86/mm: Fold p4d page table layer at runtime Kirill A. Shutemov
2017-08-07 14:14 ` [PATCHv3 10/13] x86/mm: Replace compile-time checks for 5-level with runtime-time Kirill A. Shutemov
2017-08-07 14:14 ` [PATCHv3 11/13] x86/mm: Allow to boot without la57 if CONFIG_X86_5LEVEL=y Kirill A. Shutemov
2017-08-07 14:14 ` [PATCHv3 12/13] x86/xen: Allow XEN_PV and XEN_PVH to be enabled with X86_5LEVEL Kirill A. Shutemov
2017-08-07 14:14 ` [PATCHv3 13/13] x86/mm: Offset boot-time paging mode switching cost Kirill A. Shutemov
2017-08-07 15:54 ` Andi Kleen
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