From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753304AbdHIOnG convert rfc822-to-8bit (ORCPT ); Wed, 9 Aug 2017 10:43:06 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:52423 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751972AbdHIOnF (ORCPT ); Wed, 9 Aug 2017 10:43:05 -0400 Date: Wed, 9 Aug 2017 16:42:53 +0200 From: Boris Brezillon To: Eric Anholt Cc: dri-devel@lists.freedesktop.org, Archit Taneja , Andrzej Hajda , Laurent Pinchart , Thierry Reding , linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 1/6] drm/vc4: Avoid using vrefresh==0 mode in DSI htotal math. Message-ID: <20170809164253.59bcc002@bbrezillon> In-Reply-To: <87r2wrm3ub.fsf@eliezer.anholt.net> References: <20170718210510.12229-1-eric@anholt.net> <20170804105304.68e3b02a@bbrezillon> <87r2wrm3ub.fsf@eliezer.anholt.net> X-Mailer: Claws Mail 3.14.1 (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le Fri, 04 Aug 2017 14:15:56 -0700, Eric Anholt a écrit : > Boris Brezillon writes: > > > On Tue, 18 Jul 2017 14:05:05 -0700 > > Eric Anholt wrote: > > > >> The incoming mode might have a missing vrefresh field if it came from > >> drmModeSetCrtc(), which the kernel is supposed to calculate using > >> drm_mode_vrefresh(). We could either use that or the adjusted_mode's > >> original vrefresh value. > >> > >> However, we can maintain a more exact vrefresh value (not just the > >> integer approximation), by scaling by the ratio of our clocks. > >> > >> v2: Use math suggested by Andrzej Hajda instead. > >> > >> Signed-off-by: Eric Anholt > >> --- > >> drivers/gpu/drm/vc4/vc4_dsi.c | 3 ++- > >> 1 file changed, 2 insertions(+), 1 deletion(-) > >> > >> diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c > >> index 629d372633e6..57213f4e3c72 100644 > >> --- a/drivers/gpu/drm/vc4/vc4_dsi.c > >> +++ b/drivers/gpu/drm/vc4/vc4_dsi.c > >> @@ -866,7 +866,8 @@ static bool vc4_dsi_encoder_mode_fixup(struct drm_encoder *encoder, > >> adjusted_mode->clock = pixel_clock_hz / 1000 + 1; > >> > >> /* Given the new pixel clock, adjust HFP to keep vrefresh the same. */ > >> - adjusted_mode->htotal = pixel_clock_hz / (mode->vrefresh * mode->vtotal); > >> + adjusted_mode->htotal = (pixel_clock_hz / 1000 * mode->htotal / > >> + mode->clock); > > > > Hm, I'm not sure I understand this. Shouldn't we have something like: > > > > adjusted_mode->htotal = (adjusted_mode->clock * mode->htotal) / > > mode->clock; > > > > Is there a reason for doing '+ 1' when you calculate the adjusted > > pixel clock rate but not here? > > We're actually expecting to get within epsilon of pixel_clock_hz, but we > have to bump our clk_set_rate() to a higher value because the clock > driver will give you a bad divider if you ask for anything less than the > rate it can provide. > > How about I don't increment the adjusted_mode->clock (since it'll be > userspace visible I think), and instead move that and the "Round up" > comment to the clk_set_rate()? Sounds good.