From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752504AbdHPREP (ORCPT ); Wed, 16 Aug 2017 13:04:15 -0400 Received: from mx1.redhat.com ([209.132.183.28]:37966 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751531AbdHPREO (ORCPT ); Wed, 16 Aug 2017 13:04:14 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com D2793C058EDD Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=mst@redhat.com Date: Wed, 16 Aug 2017 20:04:12 +0300 From: "Michael S. Tsirkin" To: Radim =?utf-8?B?S3LEjW3DocWZ?= Cc: Paolo Bonzini , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, stable@vger.kernel.org, Jason Wang Subject: Re: [PATCH] kvm: VMX: do not use vm-exit instruction length for fast MMIO Message-ID: <20170816200043-mutt-send-email-mst@kernel.org> References: <1502890494-35208-1-git-send-email-pbonzini@redhat.com> <20170816170843-mutt-send-email-mst@kernel.org> <20170816165625.GA32542@flask> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20170816165625.GA32542@flask> X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Wed, 16 Aug 2017 17:04:14 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Aug 16, 2017 at 06:56:25PM +0200, Radim Krčmář wrote: > 2017-08-16 17:10+0300, Michael S. Tsirkin: > > On Wed, Aug 16, 2017 at 03:34:54PM +0200, Paolo Bonzini wrote: > > > Microsoft pointed out privately to me that KVM's handling of > > > KVM_FAST_MMIO_BUS is invalid. Using skip_emulation_instruction is invalid > > > in EPT misconfiguration vmexit handlers, because neither EPT violations > > > nor misconfigurations are listed in the manual among the VM exits that > > > set the VM-exit instruction length field. > > > > > > While physical processors seem to set the field, this is not architectural > > > and is just a side effect of the implementation. I couldn't convince > > > myself of any condition on the exit qualification where VM-exit > > > instruction length "has" to be defined; there are no trap-like VM-exits > > > that can be repurposed; and fault-like VM-exits such as descriptor-table > > > exits provide no decoding information. So I don't really see any way > > > to keep the full speedup. > > > > > > What we can do is use EMULTYPE_SKIP; it only saves 200 clock cycles > > > because computing the physical RIP and reading the instruction is > > > expensive, but at least the eventfd is signaled before entering the > > > emulator. This saves on latency. While at it, don't check breakpoints > > > when skipping the instruction, as presumably any side effect has been > > > exposed already. > > > > > > Adding a hypercall or MSR write that does a fast MMIO write to a physical > > > address would do it, but it adds hypervisor knowledge in virtio, including > > > CPUID handling. So it would be pretty ugly in the guest-side implementation, > > > but if somebody wants to do it and the virtio side is acceptable to the > > > virtio maintainers, I am okay with it. > > > > > > Cc: Michael S. Tsirkin > > > Cc: stable@vger.kernel.org > > > Fixes: 68c3b4d1676d870f0453c31d5a52e7e65c7448ae > > > Suggested-by: Radim Krčmář > > > Signed-off-by: Paolo Bonzini > > > > Jason (cc) who worked on the original optimization said he can > > work to test the performance impact. > > I suggest we don't rush this (it's been like this for 2 years), > > and the issue seems to be largely theoretical. > > Paolo, did Microsoft point it out because they hit the bug when running > KVM on Hyper-V? > > Thanks. Seems likely. If we take this patch and limit it to nested virt (I would not do just hyper-v) this would be reasonable to merge very quickly then - maybe even in 4.13 - and we can discuss the theoretical issue at leasure, maybe after some feedback from intel. -- MST